ST10R272LT6 STMicroelectronics, ST10R272LT6 Datasheet - Page 17

• Manufacturer Part Number: ST10R272LT6
• Description: IC MCU 16BIT LV ROMLESS 100-TQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10R272LT6

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, SSP, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 77
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-TQFP, 144-VQFP
• Processor Series: ST10R2x
• Core: ST10
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Interface Type: SSP, USART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 77
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: In Transition
• Other names: 497-2045

The following table shows the various combinations of pointer post-modification for each of
these 2 new addressing modes. In this document the symbols “[Rw
these addressing modes.
For the CoMACM class of instruction, Parallel Data Move mechanism is implemented. This
class of instruction is only available with double indirect addressing mode. Parallel Data Move
allows the operand pointed by IDX
operation. The write-back address of Parallel Data Move is calculated depending on the post-
modification of IDX
new value of IDX
Symbol
“[IDX i ]” stands for
“[Rw
Instruction
CoMACM [IDX
CoMACM [IDX
CoMACM [IDX
CoMACM [IDX
n
]” stands for
Table 2 Pointer post-modification combinations for IDXi and Rwn
i
i
i
i
+],...
-],...
+QX
-QX
i
. The following table shows these rules.
j
i
],...
j
. It is obtained by the reverse operation than the one used to calculate the
],...
Table 3 Parallel data move addressing
Mnemonic
[IDX i ]
[IDX i ]
[IDX i -]
[Rwn]
[Rwn ]
[Rwn-]
[Rwn QR j ]
[Rwn - QR j ]
[IDX i
[IDX i - QX j ]
QX j ]
i
to be moved to a new location in parallel with the MAC
ST10R272L - MULTIPLY-ACCUMULATE UNIT (MAC)
Address Pointer Operation
(IDX i )
(IDX i )
(IDX i )
(IDX i )
(IDX i )
(Rwn)
(Rwn)
(Rwn)
(Rwn)
(Rwn)
Writeback Address
<IDX
<IDX
<IDX
<IDX
i
i
i
i
(IDX i ) (no-op)
(IDX i ) +2 (i=0,1)
(IDX i ) -2 (i=0,1)
(IDX i ) + (QX j ) (i, j =0,1)
(IDX i ) - (QX j ) (i, j =0,1)
-2>
+2>
-QX
+QX
(Rwn) (no-op)
(Rwn) +2 (n=0-15)
(Rwn) -2 (k=0-15)
(Rwn) + (QR j ) (n=0-15;j =0,1)
(Rwn) - (QR j ) (n=0-15; j =0,1)
j
>
j
>
n
]” and “[IDX
i
]” refer to
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