MC908JL3ECDWER Freescale Semiconductor, MC908JL3ECDWER Datasheet - Page 108

• Manufacturer Part Number: MC908JL3ECDWER
• Description: IC MCU 4K FLASH 8MHZ 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908JL3ECDWER

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 23
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 12x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: HC08JL
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908JL16E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

Input/Output (I/O) Ports
10.3 Port B
Port B is an 8-bit special function port that shares all eight of its port pins with the analog-to-digital
converter (ADC) module, see
10.3.1 Port B Data Register (PTB)
The port B data register contains a data latch for each of the eight port B pins.
PTB[7:0] — Port B Data Bits
ADC[7:0] — ADC channels 7 to 0
10.3.2 Data Direction Register B (DDRB)
Data direction register B determines whether each port B pin is an input or an output. Writing a one to a
DDRB bit enables the output buffer for the corresponding port B pin; a zero disables the output buffer.
DDRB[7:0] — Data Direction Register B Bits
108
These read/write bits are software programmable. Data direction of each port B pin is under the control
of the corresponding bit in data direction register B. Reset has no effect on port B data.
ADC[7:0] are pins used for the input channels to the analog-to-digital converter module. The channel
select bits, ADCH[4:0], in the ADC status and control register define which port pin will be used as an
ADC input and overrides any control from the port I/O logic. See
(ADC).
These read/write bits control port B data direction. Reset clears DDRB[7:0], configuring all port B pins
as inputs.
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
Alternative Function:
Address:
Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1.
Reset:
Read:
Write:
Address:
Reset:
Read:
Write:
DDRB7
$0005
Bit 7
0
$0001
PTB7
ADC7
Bit 7
Figure 10-7. Data Direction Register B (DDRB)
Chapter 9 Analog-to-Digital Converter
Figure 10-6. Port B Data Register (PTB)
DDRB6
MC68HC908JL3E Family Data Sheet, Rev. 4
6
0
PTB6
ADC6
6
DDRB5
5
0
AD4C5
PTB5
5
NOTE
DDRB4
4
0
Unaffected by reset
ADC4
PTB4
4
DDRB3
3
0
ADC3
PTB3
3
Chapter 9 Analog-to-Digital Converter
DDRB2
(ADC).
2
0
ADC2
PTB2
2
DDRB1
1
0
ADC2
PTB1
1
Freescale Semiconductor
DDRB0
Bit 0
0
PTB0
ADC0
Bit 0