MC908JL3ECDWER Freescale Semiconductor, MC908JL3ECDWER Datasheet - Page 36

• Manufacturer Part Number: MC908JL3ECDWER
• Description: IC MCU 4K FLASH 8MHZ 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908JL3ECDWER

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 23
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 12x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: HC08JL
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908JL16E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

Configuration Registers (CONFIG)
LVID — Low Voltage Inhibit Disable Bit
SSREC — Short Stop Recovery Bit
STOP — STOP Instruction Enable
COPD — COP Disable Bit
3.4 Configuration Register 2 (CONFIG2)
IRQPUD — IRQ Pin Pull-up control bit
LVIT1, LVIT0 — Low Voltage Inhibit trip voltage selection bits
36
SSREC enables the CPU to exit stop mode with a delay of
32 × 2OSCOUT cycles instead of a 4096 × 2OSCOUT cycle delay.
STOP enables the STOP instruction.
COPD disables the COP module. (See
Detail description of the LVI control signals is given in
1 = Low Voltage Inhibit disabled
0 = Low Voltage Inhibit enabled
1 = Stop mode recovery after 32 × 2OSCOUT cycles
0 = Stop mode recovery after 4096 × 2OSCOUT cycles
1 = STOP instruction enabled
0 = STOP instruction treated as illegal opcode
1 = COP module disabled
0 = COP module enabled
1 = Internal pull-up is disconnected
0 = Internal pull-up is connected between IRQ pin and V
Address:
Reset:
Read:
Write:
POR:
Exiting stop mode by pulling reset will result in the long stop recovery.
IRQPUD
$001E
Bit 7
R
0
0
If using an external crystal, do not set the SSREC bit.
Figure 3-2. Configuration Register 2 (CONFIG2)
= Reserved
MC68HC908JL3E Family Data Sheet, Rev. 4
R
6
0
0
Chapter 13 Computer Operating Properly
R
5
0
0
NOTE
affected
LVIT1
Not
4
0
Chapter 14 Low Voltage Inhibit (LVI)
affected
LVIT0
Not
3
0
DD
R
2
0
0
R
1
0
0
Freescale Semiconductor
(COP).)
Bit 0
R
0
0