MC9S08AC96MFGE Freescale Semiconductor, MC9S08AC96MFGE Datasheet - Page 27

MCU 8BIT 96K FLASH 44-LQFP

MC9S08AC96MFGE

Manufacturer Part Number
MC9S08AC96MFGE
Description
MCU 8BIT 96K FLASH 44-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08AC96MFGE

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
38
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-LQFP
Core
S08
Processor Series
MC9S08ACXX
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Data Ram Size
6 KB
On-chip Adc
Yes
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
8
Height
1.4 mm
Interface Type
SCI, SPI, I2C
Length
10 mm
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Width
10 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
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3.10
This section describes ac timing characteristics for each peripheral system. For detailed information about how clocks for the
bus are generated, see
3.10.1
Freescale Semiconductor
1
2
3
4
5
Num
Typical values are based on characterization data at V
This is the shortest pulse that is guaranteed to be recognized as a reset pin request. Shorter pulses are not guaranteed to
override reset requests from internal sources.
When any reset is initiated, internal circuitry drives the reset pin low for about 34 bus cycles and then samples the level on
the reset pin about 38 bus cycles later to distinguish external reset requests from internal requests.
This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or
may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case.
Timing is shown with respect to 20% V
1
2
4
6
8
3
5
7
9
AC Characteristics
C
Control Timing
Bus frequency (t
Real-time interrupt internal oscillator period
External reset pulse width
(t
Reset low drive
Active background debug mode latch setup time
Active background debug mode latch hold time
IRQ pulse width
KBIPx pulse width
Port rise and fall time (load = 50 pF)
cyc
Asynchronous path
Synchronous path
Asynchronous path
Synchronous path
Slew rate control disabled (PTxSE = 0)
Slew rate control enabled (PTxSE = 1)
= 1/f
Chapter 10, “Internal Clock Generator
RESET PIN
Self_reset
3
cyc
)
Parameter
= 1/f
4
3
2
2
MC9S08AC128 MCU Series Data Sheet, Rev. 2
Bus
DD
2
)
and 80% V
Figure 3-10. Reset Timing
Table 3-12. Control Timing
5
DD
DD
levels. Temperature range –40°C to 125°C.
= 5.0V, 25°C unless otherwise stated.
(S08ICGV4).”
Chapter 3 Electrical Characteristics and Timing Specifications
t
extrst
t
t
t
Symbol
Rise
ILIH,
ILIH,
t
t
t
MSSU
t
rstdrv
f
extrst
t
MSH
Bus
RTI
, t
t
t
IHIL
IHIL
Fall
t
1.5 x t
1.5 x t
34 x t
Self_reset
1.5 x
Min
700
100
100
dc
25
25
cyc
cyc
cyc
Typ
30
3
1
1300
Max
20
MHz
Unit
μs
ns
ns
ns
ns
ns
ns
ns
27

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