MCHC908GR8AMFAE Freescale Semiconductor, MCHC908GR8AMFAE Datasheet - Page 52

• Manufacturer Part Number: MCHC908GR8AMFAE
• Description: IC MCU 8K FLASH 8MHZ 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908GR8AMFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 7.5KB (7.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 32-LQFP
• Processor Series: HC08G
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8.2 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Analog-to-Digital Converter (ADC)
AIEN — ADC Interrupt Enable Bit
ADCO — ADC Continuous Conversion Bit
ADCH4–ADCH0 — ADC Channel Select Bits
The voltage levels supplied from internal reference nodes, as specified in
the operation of the ADC converter both in production test and for user applications.
52
In interrupt mode (AIEN = 1), COCO is a read-only bit that is not set at the end of a conversion. It
always reads as a 0.
When this bit is set, an interrupt is generated at the end of an ADC conversion. The interrupt signal is
cleared when the data register is read or the status/control register is written. Reset clears the AIEN bit.
When set, the ADC will convert samples continuously and update the ADR register at the end of each
conversion. Only one conversion is completed between writes to the ADSCR when this bit is cleared.
Reset clears the ADCO bit.
ADCH4–ADCH0 form a 5-bit field which is used to select one of 16 ADC channels. Only six channels,
AD5–AD0, are available on this MCU. The channels are detailed in
when using a port pin as both an analog and digital input simultaneously to prevent switching noise
from corrupting the analog signal. See
The ADC subsystem is turned off when the channel select bits are all set to 1. This feature allows for
reduced power consumption for the MCU when the ADC is not being used.
1 = Conversion completed (AIEN = 0)
0 = Conversion not completed (AIEN = 0) or CPU interrupt enabled (AIEN = 1)
1 = ADC interrupt enabled
0 = ADC interrupt disabled
1 = Continuous ADC conversion
0 = One ADC conversion
1. If any unused channels are selected, the resulting ADC conversion will be unknown or
The write function of the COCO bit is reserved. When writing to the ADSCR
register, always have a 0 in the COCO bit position.
Recovery from the disabled state requires one conversion cycle to stabilize.
ADCH4
reserved.
0
0
0
0
0
0
0
↓
1
1
1
1
ADCH3
MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5
↓
0
0
0
0
0
0
0
1
1
1
1
Table 3-1. Mux Channel Select
ADCH2
0
0
0
0
1
1
1
↓
1
1
1
1
Table
3-1.
ADCH1
NOTE
NOTE
↓
0
0
1
1
0
0
1
0
0
1
1
ADCH0
0
1
0
1
0
1
0
↓
0
1
0
1
(1)
Table
ADC power off
Table
Input Select
PTB0/KBD0
PTB1/AD1
PTB1/AD2
PTB2/AD3
PTB4/AD4
PTB5/AD5
Reserved
3-1. Care should be taken
V
V
REFH
REFL
3-1, are used to verify
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