R5F2121AJFP#U0 Renesas Electronics America, R5F2121AJFP#U0 Datasheet - Page 51

• Manufacturer Part Number: R5F2121AJFP#U0
• Description: MCU FLASH 96K 5K CMOS 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/21r

Specifications of R5F2121AJFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/20 Group, R8C/21 Group
Rev.2.00 Aug 27, 2008
REJ09B0250-0200
Figure 6.6
Voltage Monitor 2 Circuit Control Register
b7 b6 b5 b4
NOTES:
1.
2.
3.
4.
5.
6.
7.
8.
9.
Set the PRC3 bit in the PRCR register to 1 (enables w riting) before w riting to the VW2C register. When w riting the
VW2C register, the VW2C2 bit may be set to 1. Set the VW2C2 bit to 0 after w riting the VW2C register.
When the voltage monitor 2 interrupt is used to exit stop mode and to return again, w rite 0 to the VW2C1 bit before
w riting 1.
This bit is enabled w hen the VCA27 bit in the VCA2 register is set to 1 (voltage detection 2 circuit enabled).
Set this bit to 0 by a program. When w riting 0 by a program, it is set to 0 (it remains unchanged even if it is set to 1).
This bit is enabled w hen the VW2C0 bit is set to 1 (voltage monitor 2 interrupt/enables reset).
The VW2C0 bit is enabled w hen the VCA27 bit in the VCA2 register is set to 1 (voltage detection 2 circuit enabled).
Set the VW2C0 bit to 0 (disable) w hen the VCA27 bit is set to 0 (voltage detection 2 circuit disabled).
The VW2C7 bit is enabled w hen the VW2C1 bit is set to 1 (digital filter disabled mode).
The VW2C2 and VW2C3 bits remain unchanged in the softw are reset, w atchdog timer reset and voltage monitor 2
reset.
When the VW2C6 bit is set to 1 (voltage monitor 2 reset mode), set the VW2C7 bit to 1 (w hen VCC reaches to Vdet2
or below ) (do not set to 0).
b3 b2
VW2C Register
b1 b0
Bit Symbol
VW2C0
VW2C2
VW2C3
VW2C6
VW2C7
VW2C1
VW2F0
VW2F1
Symbol
VW2C
Page 33 of 458
Voltage monitor 2 interrupt/reset
enable bit
Voltage monitor 2 digital filter
disabled mode select bit
Voltage change detection
flag
WDT detection flag
Sampling clock select bits
Voltage monitor 2 circuit mode
select bit
Voltage monitor 2 interrupt/reset
generation condition select
bit
(7,9)
(3,4,8)
(5)
(6)
Address
Bit Name
(1)
0037h
(4,8)
(2)
b5 b4
0 0 : fOCO-S divide-by-1
0 1 : fOCO-S divide-by-2
1 0 : fOCO-S divide-by-4
1 1 : fOCO-S divide-by-8
0 : Disable
1 : Enable
0 : Digital filter enabled mode
1 : Digital filter disabled mode
0 : Not detected
1 : Vdet2 pass detected
0 : Not detected
1 : Detected
0 : Voltage monitor 2 interrupt mode
1 : Voltage monitor 2 reset mode
0 : When VCC reaches Vdet2 or above
1 : When VCC reaches Vdet2 or below
(digital filter circuit enabled)
(digital filter circuit disabled)
After Reset
Function
00h
6. Voltage Detection Circuit
(8)
RW
RW
RW
RW
RW
RW
RW
RW
RW