M38504E6FP#U0 Renesas Electronics America, M38504E6FP#U0 Datasheet - Page 94

• Manufacturer Part Number: M38504E6FP#U0
• Description: MCU 4.0/5.5V 24K PB-FREE 42-SSOP
• Manufacturer: Renesas Electronics America
• Series: 740/38000r

Specifications of M38504E6FP#U0

• Core Processor: 740
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SIO, UART/USART
• Peripherals: PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 24KB (24K x 8)
• Program Memory Type: OTP
• Ram Size: 640 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 42-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

3850 Group (Spec.A)
Note : When f(X
Table 37 Timing requirements (2) (spec. A)
(V
Note : When f(X
Rev.3.01
Timing requirements
Table 36 Timing requirements (1) (spec. A)
(V
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
W
C
WH
WL
C
WH
WL
WH
WL
C
WH
WL
su
h
C
WH
WL
su
h
W
C
WH
WL
C
WH
WL
WH
WL
C
WH
WL
su
h
C
WH
WL
su
h
CC
CC
(S
(S
(S
(S
(X
(CNTR)
(S
(S
(X
(CNTR)
(S
(S
(RESET)
(RESET)
(R
(S
(R
(S
(X
(CNTR)
(INT)
(S
(S
(X
(CNTR)
(INT)
(S
(S
(X
(CNTR)
(INT)
(S
(S
(X
(CNTR)
(INT)
(S
(S
CLK1
CLK2
= 2.7 to 5.5 V, V
CLK1
CLK2
= 4.0 to 5.5 V, V
IN
CLK1
CLK2
IN
CLK1
CLK2
Symbol
IN2
Symbol
IN2
x
x
Divide this value by four when f(X
Divide this value by four when f(X
IN
CLK1
CLK2
IN
CLK1
CLK2
IN
CLK1
D-S
CLK2
IN
CLK1
D-S
CLK2
)
)
)
)
-S
-S
)
)
-S
-R
-S
-R
)
)
)
)
CLK1
CLK1
CLK2
CLK2
)
)
)
)
)
)
)
)
IN2
IN2
x
x
2003.06.20
D)
D)
IN
)
)
IN
)
)
)
)
) = 8 MHz and bit 6 of address 001A
) = 4 MHz and bit 6 of address 001A
Reset input “L” pulse width
External clock input cycle time
External clock input “H” pulse width
External clock input “L” pulse width
CNTR
CNTR
CNTR
INT
INT
Serial I/O1 clock input cycle time (Note)
Serial I/O1 clock input “H” pulse width (Note)
Serial I/O1 clock input “L” pulse width (Note)
Serial I/O1 input setup time
Serial I/O1 input hold time
Serial I/O2 clock input cycle time
Serial I/O2 clock input “H” pulse width
Serial I/O2 clock input “L” pulse width
Serial I/O2 clock input setup time
Serial I/O2 clock input hold time
SS
Reset input “L” pulse width
External clock input cycle time
External clock input “H” pulse width
External clock input “L” pulse width
CNTR
CNTR
CNTR
INT
INT
Serial I/O1 clock input cycle time (Note)
Serial I/O1 clock input “H” pulse width (Note)
Serial I/O1 clock input “L” pulse width (Note)
Serial I/O1 input setup time
Serial I/O1 input hold time
Serial I/O2 clock input cycle time
Serial I/O2 clock input “H” pulse width
Serial I/O2 clock input “L” pulse width
Serial I/O2 clock input setup time
Serial I/O2 clock input hold time
SS
= 0 V, T
= 0 V, T
0
0
0
0
to INT
to INT
to INT
to INT
page 92 of 98
0
0
0
0
0
0
, CNTR
, CNTR
, CNTR
, CNTR
, CNTR
, CNTR
a
a
3
3
3
3
= –20 to 85 C, unless otherwise noted)
= –20 to 85 C, unless otherwise noted)
input “H” pulse width
input “L” pulse width
input “H” pulse width
input “L” pulse width
IN
1
1
1
1
1
1
IN
) = 8 MHz and bit 6 of address 001A
input cycle time
input “H” pulse width
input “L” pulse width
input cycle time
input “H” pulse width
input “L” pulse width
) = 4 MHz and bit 6 of address 001A
16
16
Parameter
Parameter
is “1” (clock synchronous).
is “1” (clock synchronous).
16
16
is “0” (UART).
is “0” (UART).
2000
2000
1000
Min.
Min.
166
500
230
230
230
230
950
950
400
200
950
950
400
300
200
800
370
370
220
100
400
400
200
200
20
66
66
20
80
32
32
80
80
80
80
Limits
Limits
Typ.
Typ.
Max.
Max.
X
X
IN
IN
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
cycle
cycle