MC68HC11K0CFUE4 Freescale Semiconductor, MC68HC11K0CFUE4 Datasheet - Page 38
MC68HC11K0CFUE4
Manufacturer Part Number
MC68HC11K0CFUE4
Description
MCU 8-BIT 768 RAM 4MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HC11r
Specifications of MC68HC11K0CFUE4
Core Processor
HC11
Core Size
8-Bit
Speed
4MHz
Connectivity
SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
37
Program Memory Type
ROMless
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI, SPI
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
37
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68HC11K0CFUE4
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Pin Description
2.6 XOUT
2.7 E-Clock Output (E)
2.8 Interrupt Request (IRQ) and Non-Maskable Interrupt (XIRQ)
Technical Data
38
NOTE:
The XOUT pin provides a buffered clock signal if enabled to synchronize
external devices with the MCU. See
This signal is not present on the 80-pin M68HC(7)11K device QFP
package.
The internally generated instruction cycle clock, or E clock, is available
on the E pin as a timing reference. Its frequency is one fourth the input
frequency at the XTAL and EXTAL pins. The E clock is low during the
address portion of a bus cycle and high during the data access portion
of the bus cycle. All clocks, including the E clock, are halted when the
MCU is in stop mode. The E-pin driver can be turned off in single-chip
modes to reduce radio frequency interference (RFI) and current
consumption.
The MCU provides two pins for applying asynchronous interrupt
requests. Interrupts applied to the IRQ pin can be masked by setting the
I bit in the condition code register (CCR), which can be set or cleared by
software at any time. Triggering is level sensitive by default, which is
Freescale Semiconductor, Inc.
For More Information On This Product,
* This value includes all stray capacitances.
Go to: www.freescale.com
MCU
Figure 2-6. Common Crystal Connections
EXTAL
XTAL
Pin Description
10 M
4.9 XOUT Pin
CRYSTAL
4 x E
C
C
Control.
L
L
*
*
M68HC11K Family
MOTOROLA
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