DF2378RVFQ34V Renesas Electronics America, DF2378RVFQ34V Datasheet - Page 51

IC H8S MCU FLASH 512K 144LQFP

DF2378RVFQ34V

Manufacturer Part Number
DF2378RVFQ34V
Description
IC H8S MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2378RVFQ34V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
34MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
97
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
For Use With
YLCDRSK2378 - KIT DEV EVAL H8S/2378 LCDYR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK2378 - DEV EVAL KIT FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2378RVFQ34V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Figure 8.17 Example of Block Transfer Mode (Cycle Steal Mode) Transfer............................. 395
Figure 8.18 Example of Normal Mode Transfer Activated by EDREQ Pin Falling Edge ......... 396
Figure 8.19 Example of Block Transfer Mode Transfer Activated
Figure 8.20 Example of Normal Mode Transfer Activated
Figure 8.21 Example of Block Transfer Mode Transfer Activated by
Figure 8.22 Example of Single Address Mode (Byte Read) Transfer ........................................ 400
Figure 8.23 Example of Single Address Mode (Word Read) Transfer....................................... 400
Figure 8.24 Example of Single Address Mode (Byte Write) Transfer ....................................... 401
Figure 8.25 Example of Single Address Mode (Word Write) Transfer...................................... 402
Figure 8.26 Example of Single Address Mode Transfer Activated by
Figure 8.27 Example of Single Address Mode Transfer Activated by
Figure 8.28 Auto Request/Cycle Steal Mode/Normal Transfer Mode
Figure 8.29 Auto Request/Cycle Steal Mode/Normal Transfer Mode
Figure 8.30 Auto Request/Cycle Steal Mode/Normal Transfer Mode
Figure 8.31 Auto Request/Burst Mode/Normal Transfer Mode
Figure 8.32 Auto Request/Burst Mode/Normal Transfer Mode
Figure 8.33 Auto Request/Burst Mode/Normal Transfer Mode
Figure 8.34 Auto Request/Burst Mode/Normal Transfer Mode
Figure 8.35 External Request/Cycle Steal Mode/Normal Transfer Mode
Figure 8.36 External Request/Cycle Steal Mode/Normal Transfer Mode
Figure 8.37 External Request/Cycle Steal Mode/Normal Transfer Mode
Figure 8.38 External Request/Cycle Steal Mode/Normal Transfer Mode Contention
Figure 8.39 External Request/Cycle Steal Mode/Block Transfer Mode
by EDREQ Pin Falling Edge................................................................................... 397
by EDREQ Pin Low Level ...................................................................................... 398
EDREQ Pin Low Level........................................................................................... 399
EDREQ Pin Falling Edge........................................................................................ 403
EDREQ Pin Low Level........................................................................................... 404
(No Contention/Dual Address Mode) ..................................................................... 405
(CPU Cycles/Single Address Mode) ....................................................................... 406
(Contention with Another Channel/Single Address Mode)..................................... 406
(CPU Cycles/Dual Address Mode/BGUP = 0)........................................................ 407
(CPU Cycles/Dual Address Mode/BGUP = 1)........................................................ 407
(CPU Cycles/Single Address Mode/BGUP = 1) ..................................................... 408
(Contention with Another Channel/Single Address Mode)..................................... 408
(No Contention/Dual Address Mode/Low Level Sensing)...................................... 409
(CPU Cycles/Single Address Mode/Low Level Sensing) ....................................... 410
(No Contention/Single Address Mode/Falling Edge Sensing) ................................ 410
with Another Channel/Dual Address Mode/Low Level Sensing ............................ 411
(No Contention/Dual Address Mode/Low Level Sensing/BGUP = 0).................... 412
Rev.7.00 Mar. 18, 2009 page xlix of lxvi
REJ09B0109-0700

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