HD6417034AFI20V Renesas Electronics America, HD6417034AFI20V Datasheet - Page 267

• Manufacturer Part Number: HD6417034AFI20V
• Description: MCU 5V 0K I-TEMP PB-FREE 112-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7030r

Specifications of HD6417034AFI20V

• Core Processor: SH-1
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

on a compare match of general register A2 (GRA2); 0 is output on a compare match of general
register B2 (GRB2).
Bit 2: PWM2
0
1
Bit 1—PWM Mode 1 (PWM1): PWM1 selects the PWM mode for channel 1. When the PWM1
bit is set to 1 and PWM mode is entered, the TIOCA1 pin becomes a PWM output pin. 1 is output
on a compare match of general register A1 (GRA1); 0 is output on a compare match of general
register B1 (GRB1).
Bit 1: PWM1
0
1
Bit 0—PWM Mode 0 (PWM0): PWM0 selects the PWM mode for channel 0. When the PWM0
bit is set to 1 and PWM mode is entered, the TIOCA0 pin becomes a PWM output pin. 1 is output
on a compare match of general register A0 (GRA0); 0 is output on a compare match of general
register B0 (GRB0).
Bit 0: PWM0
0
1
10.2.4
The timer function control register (TFCR) is an 8-bit read/write register that selects
complementary PWM/reset-synchronized PWM for channels 3 and 4 and sets the buffer operation.
TFCR is initialized to H'C0 or H'40 by a reset and in standby mode.
Note: * Undefined
Bit
Initial value
Read/Write
Timer Function Control Register (TFCR)
Description
Channel 2 operates normally
Channel 2 operates in PWM mode
Description
Channel 1 operates normally
Channel 1 operates in PWM mode
Description
Channel 0 operates normally
Channel 0 operates in PWM mode
—
—
7
*
—
—
6
1
CMD1
R/W
5
0
Section 10 16-Bit Integrated Timer Pulse Unit (ITU)
CMD0
R/W
4
0
Rev. 7.00 Jan 31, 2006 page 239 of 658
BFB4
R/W
3
0
BFA4
R/W
2
0
REJ09B0272-0700
BFB3
R/W
1
0
(Initial value)
(Initial value)
(Initial value)
BFA3
R/W
0
0