HD6417034AFI20V Renesas Electronics America, HD6417034AFI20V Datasheet - Page 93

MCU 5V 0K I-TEMP PB-FREE 112-QFP

HD6417034AFI20V

Manufacturer Part Number
HD6417034AFI20V
Description
MCU 5V 0K I-TEMP PB-FREE 112-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7030r
Datasheet

Specifications of HD6417034AFI20V

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417034AFI20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
4.8
4.8.1
An address error occurs if the stack is accessed for exception handling when the value of the stack
pointer (SP) is not a multiple of four. Therefore, a multiple of four should always be stored in the
SP.
4.8.2
An address error occurs if the vector table is accessed for exception handling when the value of
the vector base register (VBR) is not a multiple of four. Therefore, VBR should always be set to a
multiple of four.
4.8.3
If the stack pointer is not a multiple of four, address errors will occur in the exception handling
(interrupt, etc.) stacking. After the exception handling ends, the CPU will then shift to address
error exception handling. An address error will also occur during the address error exception
handling stacking, but the CPU is set up to ignore the address error so that it can avoid an infinite
series of address errors. This allows it to shift program control to the address error exception
handling routine and handle the error.
When an address error does occur in exception handling stacking, the stacking bus cycle (write) is
executed. In SR and PC stacking, four is subtracted from each of the SPs so the SP values are not
multiples of four after stacking either. Since the address value output during stacking is the SP
value, the address that produced the error is exactly what is output. In such cases, the stacked write
data will be undefined.
Notes
Value of the Stack Pointer (SP)
Value of the Vector Base Register (VBR)
Address Errors Caused by Stacking During Address Error Exception Handling
Rev. 7.00 Jan 31, 2006 page 65 of 658
Section 4 Exception Handling
REJ09B0272-0700

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