HD6473834HV Renesas Electronics America, HD6473834HV Datasheet - Page 283

MCU 5V 32K PB-FREE 100-QFP

HD6473834HV

Manufacturer Part Number
HD6473834HV
Description
MCU 5V 32K PB-FREE 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet

Specifications of HD6473834HV

Core Processor
H8/300L
Core Size
8-Bit
Speed
5MHz
Connectivity
SCI
Peripherals
LCD, PWM
Number Of I /o
71
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6473834HV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6473834HV
Manufacturer:
RENESAS
Quantity:
2 120
The meaning of n is shown in table 10.12.
Table 10.12 Relation between n and Clock
n
0
1
2
3
10.4.3
SCI3 supports serial data communication in both asynchronous mode, where each character
transferred is synchronized separately, and synchronous mode, where transfer is synchronized by
clock pulses.
The choice of asynchronous mode or synchronous mode, and the communication format, is made
in the serial mode register (SMR), as shown in table 10.13. The SCI3 clock source is determined
by bit COM in SMR and bits CKE1 and CKE0 in serial control register 3 (SCR3), as shown in
table 10.14.
Asynchronous Mode:
266
Data length: choice of 7 bits or 8 bits
Transmit/receive format options include addition of parity bit, multiprocessor bit, and one or
two stop bits (character length depends on this combination of options).
Framing error (FER), parity error (PER), overrun error (OER), and line breaks can be detected
when data is received.
Clock source: Choice of internal clocks or an external clock
When an internal clock is selected: Operates on baud rate generator clock. A clock can be
output with the same frequency as the bit rate.
When an external clock is selected: A clock input with a frequency 16 times the bit rate is
required (internal baud rate generator is not used).
Clock
Operation
/4
/16
/64
CKS1
0
0
1
1
SMR Setting
CKS0
0
1
0
1

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