HD6473834HV Renesas Electronics America, HD6473834HV Datasheet - Page 302

• Manufacturer Part Number: HD6473834HV
• Description: MCU 5V 32K PB-FREE 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Lr

Specifications of HD6473834HV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 5MHz
• Connectivity: SCI
• Peripherals: LCD, PWM
• Number Of I /o: 71
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Notes: 1. To switch from transmitting to simultaneous transmitting and receiving, use the
10.4.6
The multiprocessor communication function enables several processors to share a single serial
communication line. The processors communicate in asynchronous mode using a format with an
additional multiprocessor bit (multiprocessor format).
In multiprocessor communication, each receiving processor is addressed by an ID code. A serial
communication cycle consists of two cycles: an ID-sending cycle that identifies the receiving
processor, and a data-sending cycle. The ID-sending cycle and data-sending cycle are
differentiated by the multiprocessor bit. The multiprocessor bit is 1 in an ID-sending cycle, and 0
in a data-sending cycle.
The transmitting processor starts by sending the ID of the receiving processor with which it wants
to communicate as data with the multiprocessor bit set to 1. Next the transmitting processor sends
transmit data with the multiprocessor bit cleared to 0. When a receiving processor receives data
with the multiprocessor bit set to 1, it compares the data with its own ID. If the data matches its
ID, the receiving processor continues to receive incoming data. If the data does not match its ID,
the receiving processor skips further incoming data until it again receives data with the
multiprocessor bit set to 1. Multiple processors can send and receive data in this way.
Figure 10.22 shows an example of communication among different processors using a
multiprocessor format.
2. To switch from receiving to simultaneous transmitting and rceiving, use the following
Multiprocessor Communication Function
following procedure.
• First confirm that TDRE and TEND are both set to 1 and that SCI3 has finished
procedure.
• After confirming that SCI3 has finished receiving, clear RE to 0. Next, after
transmitting. Next clear TE to 0. Then set both TE and RE to 1.
confirming that RDRF and the error flags (OER FER, PER) are all 0, set both TE
and RE to 1.
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