UPD78F9234MC-5A4-A Renesas Electronics America, UPD78F9234MC-5A4-A Datasheet - Page 100

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UPD78F9234MC-5A4-A

Manufacturer Part Number
UPD78F9234MC-5A4-A
Description
MCU 8BIT 8KB FLASH 30PIN
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet

Specifications of UPD78F9234MC-5A4-A

Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Connectivity
LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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98
(5) Port mode register 3 (PM3)
Cautions 1. Always set data to PRM00 after stopping the timer operation.
Remark n = 0, 1
This register sets port 3 input/output in 1-bit units.
When using the P31/TO00/TI010/INTP2 pin for timer output, set PM31 and the output latch of P31 to 0.
When using the P30/TI000/INTP0 and P31/TO00/TI010/INTP2 pins as a timer input, set PM30 and PM31 to 1.
At this time, the output latches of P30 and P31 can be either 0 or 1.
PM3 is set by a 1-bit or 8-bit memory manipulation instruction.
Generation of reset signal sets the value of PM3 to FFH.
2. If the valid edge of the TI000 pin is to be set as the count clock, do not set the clear/start
3. In the following cases, note with caution that the valid edge of the TI0n0 pin is detected.
4. The sampling clock used to eliminate noise differs when a TI000 valid edge is used as the
5. When using P31 as the input pin (TI010) of the valid edge, it cannot be used as a timer
mode and the capture trigger at the valid edge of the TI000 pin.
count clock and when it is used as a capture trigger. In the former case, the count clock
is f
(PRM00). The capture operation is not performed until the valid edge is sampled and the
valid level is detected twice, thus eliminating noise with a short pulse width.
output pin (TO00). When using P31 as the timer output pin (TO00), it cannot be used as
the input pin (TI010) of the valid edge.
<1> Immediately after a system reset, if a high level is input to the TI0n0 pin, the
<2> If the TM00 operation is stopped while the TI0n0 pin is high level, TM00 operation is
<3> If the TM00 operation is stopped while the TI0n0 pin is low level, TM00 operation is
XP
operation of the 16-bit timer counter 00 (TM00) is enabled
→ If the rising edge or both rising and falling edges are specified as the valid edge
then enabled after a low level is input to the TI0n0 pin
→ If the falling edge or both rising and falling edges are specified as the valid edge
then enabled after a high level is input to the TI0n0 pin
→ If the rising edge or both rising and falling edges are specified as the valid edge
, and in the latter case the count clock is selected by prescaler mode register 00
Symbol
Address: FF23H
of the TI0n0 pin, a rising edge is detected immediately after the TM00 operation is
enabled.
of the TI0n0 pin, a falling edge is detected immediately after the TM00 operation is
enabled.
of the TI0n0 pin, a rising edge is detected immediately after the TM00 operation is
enabled.
PM3
Figure 6-9. Format of Port Mode Register 3 (PM3)
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
PM3n
7
1
0
1
P3n pin I/O mode selection (n = 0 to 3)
Output mode (output buffer on)
Input mode (output buffer off)
User’s Manual U17446EJ5V0UD
6
1
After reset: FFH
5
1
4
1
PM33
R/W
3
PM32
2
PM31
1
PM30
0

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