UPD78F9234MC-5A4-A Renesas Electronics America, UPD78F9234MC-5A4-A Datasheet - Page 267

• Manufacturer Part Number: UPD78F9234MC-5A4-A
• Description: MCU 8BIT 8KB FLASH 30PIN
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9234MC-5A4-A

• Core Processor: 78K0S
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

POC detection voltage
LVI detection voltage
Supply voltage (V
(2) When used as interrupt
Notes 1.
Remark <1> to <7> in Figure 17-5 above correspond to <1> to <7> in the description of “when starting operation”
Internal reset signal
(set by software)
(set by software)
<1> Mask the LVI interrupt (LVIMK = 1).
<2> Set the detection voltage using bits 3 to 0 (LVIS3 to LVIS0) of the low-voltage detection level select
<3> Set bit 7 (LVION) of LVIM to 1 (enables LVI operation).
<4> Use software to instigate a wait of at least 0.2 ms.
<5> Wait until “supply voltage (V
<6> Clear the interrupt request flag of LVI (LVIIF) to 0.
<7> Release the interrupt mask flag of LVI (LVIMK).
<8> Execute the EI instruction (when vector interrupts are used).
Figure 17-5 shows the timing of generating the interrupt signal of the low-voltage detector. Numbers <1> to
<7> in this figure correspond to <1> to <7> above.
When starting operation
When stopping operation
Either of the following procedures must be executed.
2.
LVIMK flag
LVION flag
LVIIF flag
When using 8-bit memory manipulation instruction: Write 00H to LVIM.
When using 1-bit memory manipulation instruction: Clear LVION to 0.
LVIF flag
register (LVIS).
in 17.4 (2) When used as interrupt.
INTLVI
The LVIMK flag is set to “1” by reset signal generation.
An interrupt request signal (INTLVI) may be generated, and the LVIF and LVIIF flags may be set to 1.
(V
(V
POC
LVI
DD
)
Figure 17-5. Timing of Low-Voltage Detector Interrupt Signal Generation
)
)
<2>
<1>
Note 1
Note 2
Note 2
Note 2
<3>
<5>
<6>
Cleared by software
<7> Cleared by software
CHAPTER 17 LOW-VOLTAGE DETECTOR
<4> 0.2 ms or longer
DD
)
User’s Manual U17446EJ5V0UD
detection voltage (V
LVI
)” at bit 0 (LVIF) of LVIM is confirmed.
Time
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