UPD78F1146AF1-BA4-A Renesas Electronics America, UPD78F1146AF1-BA4-A Datasheet - Page 498

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UPD78F1146AF1-BA4-A

Manufacturer Part Number
UPD78F1146AF1-BA4-A
Description
MCU 16BIT 78K0R/KX3 64-FBGA
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1146AF1-BA4-A

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
address other than that of the local address is received, ACK is not generated (NACK).
496
When the local address is received, ACK is automatically generated, regardless of the value of ACKE0. When an
When an extension code is received, ACK is generated if ACKE0 is set to 1 in advance.
How ACK is generated when data is received differs as follows depending on the setting of the wait timing.
• When 8-clock wait state is selected (bit 3 (WTIM0) of IICC0 register = 0):
• When 9-clock wait state is selected (bit 3 (WTIM0) of IICC0 register = 1):
By setting ACKE0 to 1 before releasing the wait state, ACK is generated at the falling edge of the eighth clock of
the SCL0 pin.
ACK is generated by setting ACKE0 to 1 in advance.
SDA0
SCL0
A6
1
CHAPTER 12 SERIAL INTERFACE IIC0
A5
2
User’s Manual U17854EJ9V0UD
Figure 12-17. ACK
A4
3
A3
4
A2
5
A1
6
A0
7
R/W
8
ACK
9

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