ATMEGA161-8PI Atmel, ATMEGA161-8PI Datasheet - Page 13

• Manufacturer Part Number: ATMEGA161-8PI
• Description: IC AVR MCU 16K 8MHZ IND 40-DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA161-8PI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -
• Other names: ATMEGA1618PI

Program and Data
Addressing Modes
Register Direct, Single
Register Rd
Register Direct, Two Registers
Rd and Rr
1228D–AVR–02/07
The five different Addressing modes for the Data memory cover: Direct, Indirect with
Displacement, Indirect, Indirect with Pre-decrement and Indirect with Post-increment. In
the Register File, registers R26 to R31 feature the indirect Addressing Pointer
Registers.
The direct addressing reaches the entire data space.
The Indirect with Displacement mode features a 63-address locations reach from the
base address given by the Y- or Z-register.
When using Register Indirect Addressing modes with automatic pre-decrement and
post-increment, the address registers X, Y, and Z are decremented and incremented.
The 32 general purpose working registers, 64 I/O Registers and the 1K byte of internal
data SRAM in the ATmega161 are all accessible through all these Addressing modes.
See the next section for a detailed description of the different Addressing modes.
The ATmega161 AVR RISC microcontroller supports powerful and efficient Addressing
modes for access to the Program memory (Flash) and Data memory (SRAM, Register
File and I/O memory). This section describes the different Addressing modes supported
by the AVR architecture. In the figures, OP means the operation code part of the instruc-
tion word. To simplify, not all figures show the exact location of the addressing bits.
Figure 9. Direct Single Register Addressing
The operand is contained in register d (Rd).
Figure 10. Direct Register Addressing, Two Registers
15
15
OP
OP
9
r
5 4
4
d
d
0
0
REGISTER FILE
REGISTER FILE
ATmega161(L)
0
d
31
0
d
r
31
13