ATMEGA161-8PI Atmel, ATMEGA161-8PI Datasheet - Page 82

• Manufacturer Part Number: ATMEGA161-8PI
• Description: IC AVR MCU 16K 8MHZ IND 40-DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA161-8PI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -
• Other names: ATMEGA1618PI

82
ATmega161(L)
• Bit 4
This bit is set (one) when a comparator output event triggers the interrupt mode defined
by ACI1 and ACI0. The Analog Comparator Interrupt routine is executed if the ACIE bit
is set (one) and the I-bit in SREG is set (one). ACI is cleared by hardware when execut-
ing the corresponding Interrupt Handling Vector. Alternatively, ACI is cleared by writing
a logical “1” to the Flag.
• Bit 3
When the ACIE bit is set (one) and the I-bit in the Status Register is set (one), the Ana-
log Comparator Interrupt is enabled. When cleared (zero), the interrupt is disabled.
• Bit 2
When set (one), this bit enables the Input Capture function in Timer/Counter1 to be trig-
gered by the Analog Comparator. The comparator output is, in this case, directly
connected to the Input Capture front-end logic, making the comparator utilize the noise
canceler and edge select features of the Timer/Counter1 Input Capture Interrupt. When
cleared (zero), no connection between the Analog Comparator and the Input Capture
function is given. To make the comparator trigger the Timer/Counter1 Input Capture
Interrupt, the TICIE1 bit in the Timer Interrupt Mask Register (TIMSK) must be set (one).
• Bits 1, 0
These bits determine which comparator events trigger the Analog Comparator Interrupt.
The different settings are shown in Table 26.
Table 26. ACIS1/ACIS0 Settings
Note:
Caution: Using the SBI or CBI instruction on bits other than ACI in this register will write
a one back into ACI if it is read as set, thus clearing the Flag.
The Analog Comparator pins (PB2 and PB3) are also used as the TXD1 and RXD1 pins
for UART1. Note that if the UART1 transceiver or Receiver is enabled, the UART1 will
override the settings in the DDRB Register even if the Analog Comparator is enabled.
Therefore, it is not recommended to use UART1 if the Analog Comparator is needed in
the same application at the same time. See “UARTs” on page 69 for more details.
ACIS1
0
0
1
1
–
–
–
1. When changing the ACIS1/ACIS0 bits, the Analog Comparator Interrupt must be dis-
ACI: Analog Comparator Interrupt Flag
ACIE: Analog Comparator Interrupt Enable
ACIC: Analog Comparator Input Capture Enable
abled by clearing its Interrupt Enable bit in the ACSR Register. Otherwise, an
interrupt can occur when the bits are changed.
–
ACIS1, ACIS0: Analog Comparator Interrupt Mode Select
ACIS0
0
1
0
1
Interrupt Mode
Comparator Interrupt on Output Toggle
Reserved
Comparator Interrupt on Falling Output Edge
Comparator Interrupt on Rising Output Edge
(1)
1228D–AVR–02/07