ATMEGA161-8PI Atmel, ATMEGA161-8PI Datasheet - Page 87

• Manufacturer Part Number: ATMEGA161-8PI
• Description: IC AVR MCU 16K 8MHZ IND 40-DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA161-8PI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -
• Other names: ATMEGA1618PI

1228D–AVR–02/07
Figure 51. External Data Memory Cycles with SRWn1 = 0 and SRWn0 = 1
Note:
Figure 52. External Data Memory Cycles with SRWn1 = 1 and SRWn0 = 0
Note:
Figure 53. External Data Memory Cycles with SRWn1 = 1 and SRWn0 = 1
Note:
Data/Address [7..0]
Data/Address [7..0]
Data/Address [7..0]
Data/Address [7..0]
Data/Address [7..0]
Data/Address [7..0]
System Clock Ø
System Clock Ø
Address [15..8]
Address [15..8]
System Clock Ø
Address [15..8]
1. SRWn1 = SRW11 (upper page) or SRW01 (lower page), SRWn0 = SRW10 (upper
1. SRWn1 = SRW11 (upper page) or SRW01 (lower page), SRWn0 = SRW10 (upper
1. SRWn1 = SRW11 (upper page) or SRW01 (lower page), SRWn0 = SRW10 (upper
ALE
WR
RD
ALE
WR
RD
page) or SRW00 (lower page). The ALE pulse in period T5 is only present if the next
instruction accesses the RAM (internal or external). The Data and Address will only
change in T5 if ALE is present (the next instruction accesses the RAM).
page) or SRW00 (lower page). The ALE pulse in period T6 is only present if the next
instruction accesses the RAM (internal or external). The Data and Address will only
change in T6 if ALE is present (the next instruction accesses the RAM).
page) or SRW00 (lower page). The ALE pulse in period T7 is only present if the next
instruction accesses the RAM (internal or external). The Data and Address will only
change in T7 if ALE is present (the next instruction accesses the RAM).
ALE
WR
RD
Prev. addr.
Prev. data
Prev. data
Prev. addr.
Prev. data
Prev. data
Prev. addr.
Prev. data
Prev. data
T1
T1
XX
XX
XX
XX
XX
XX
T1
Address
Address
XX
XX
XX
Address
Address
T2
XX
T2
Address
Address
XX
T2
Address
Data
Data
T3
XX
Address
Data
Data
T3
Address
Data
Data
T4
T3
T4
T5
ATmega161(L)
T4
T5
T6
T5
(1)
(1)
(1)
T6
T7
XX
XX
XX
XX
XX
XX
XX
XX
XX
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