ATMEGA48V-10AI Atmel, ATMEGA48V-10AI Datasheet - Page 16

IC AVR MCU 4K 5V 10MHZ 32-TQFP

ATMEGA48V-10AI

Manufacturer Part Number
ATMEGA48V-10AI
Description
IC AVR MCU 4K 5V 10MHZ 32-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA48V-10AI

Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
ATMEGA48V-12AI
ATMEGA48V-12AI

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA48V-10AI
Manufacturer:
Atmel
Quantity:
10 000
7. AVR Memories
7.1
7.2
16
Overview
In-System Reprogrammable Flash Program Memory
ATmega48/88/168
This section describes the different memories in the ATmega48/88/168. The AVR architecture
has two main memory spaces, the Data Memory and the Program Memory space. In addition,
the ATmega48/88/168 features an EEPROM Memory for data storage. All three memory spaces
are linear and regular.
The ATmega48/88/168 contains 4K/8K/16K bytes On-chip In-System Reprogrammable Flash
memory for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is orga-
nized as 2K/4K/8K × 16. For software security, the Flash Program memory space is divided into
two sections, Boot Loader Section and Application Program Section in ATmega88 and
ATmega168. ATmega48 does not have separate Boot Loader and Application Program sec-
tions, and the SPM instruction can be executed from the entire Flash. See SELFPRGEN
description in section
266
The Flash memory has an endurance of at least 10,000 write/erase cycles. The
ATmega48/88/168 Program Counter (PC) is 11/12/13 bits wide, thus addressing the 2K/4K/8K
program memory locations. The operation of Boot Program section and associated Boot Lock
bits for software protection are described in detail in
on page 261
ATmega168” on page
on Flash Programming in SPI- or Parallel Programming mode.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory instruction description).
Timing diagrams for instruction fetch and execution are presented in
ing” on page
and
page
13.
and
282for more details.
“Boot Loader Support – Read-While-Write Self-Programming, ATmega88 and
“SPMCSR – Store Program Memory Control and Status Register” on page
268.
“Memory Programming” on page 284
“Self-Programming the Flash, ATmega48”
contains a detailed description
“Instruction Execution Tim-
2545S–AVR–07/10

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