Z8F6422AR020SC Zilog, Z8F6422AR020SC Datasheet - Page 260

• Manufacturer Part Number: Z8F6422AR020SC
• Description: IC ENCORE MCU FLASH 64K 64LQFP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F6422AR020SC

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-LQFP
• Processor Series: Z8F642x
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Number Of Timers: 16 Bit
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: Z8F64200100KITG, ZENETSC0100ZACG, ZUSBSC00100ZACG, Z8F64210100ZDA, Z8F64210100ZDP, Z8F64210100ZDV, Z8F64220100ZDA, Z8F64220100ZDV, Z8F6422AR00ZEM, Z8F6422VS00ZEM, Z8F6421AN00ZEM
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 269-4678 - KIT DEV FOR Z8F642 MCU 44 PIN269-4677 - KIT DEV FOR Z8F642 MCU 28PIN269-4540 - KIT DEV FOR Z8 ENCORE 16K TO 64K
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available
• Other names: 269-3302

eZ8 CPU Instruction Summary
.
Table 133. eZ8 CPU Instruction Summary
PS019921-0308
Assembly
Mnemonic
ADC dst, src
ADCX dst, src dst ← dst + src + C
ADD dst, src
ADDX dst, src dst ← dst + src
Symbolic Operation
dst ← dst + src + C
dst ← dst + src
Table 132. Rotate and Shift Instructions (Continued)
Table 133
modes employed by the instruction, the effect upon the Flags register, the number of CPU
clock cycles required for the instruction fetch, and the number of CPU clock cycles
required for the instruction execution.
Mnemonic
SRL
SWAP
summarizes the eZ8 CPU instructions. The table identifies the addressing
Operands
dst
dst
dst
ER
ER
ER
ER
IR
IR
R
R
R
R
R
R
Address
r
r
r
r
Mode
Instruction
Shift Right Logical
Swap Nibbles
src
ER
ER
IM
IM
IM
IM
IM
IM
IR
IR
R
R
Ir
Ir
r
r
Opcode(s)
(Hex)
12
13
14
15
16
17
18
19
02
03
04
05
06
07
08
09
C Z
*
*
*
*
*
*
*
*
Z8 Encore! XP
Flags
S V D H
*
*
*
*
*
*
*
*
Product Specification
0
0
0
0
eZ8
*
*
*
*
™
®
CPU Instruction Set
Cycles
Fetch
F64XX Series
2
4
2
4
2
3
3
3
3
4
2
3
3
3
3
4
Cycles
Instr.
3
4
3
4
3
4
3
3
3
4
3
4
3
4
3
3
246