ST7FLI19BY1M3TR STMicroelectronics, ST7FLI19BY1M3TR Datasheet - Page 128

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ST7FLI19BY1M3TR

Manufacturer Part Number
ST7FLI19BY1M3TR
Description
IC MCU 8BIT 4K FLASH 16SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST7FLI19BY1M3TR

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
16-SOIC (0.300", 7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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ST7LITE1xB
EMC CHARACTERISTICS (Cont’d)
13.7.3 Absolute Maximum Ratings (Electrical
Sensitivity)
Based on two different tests (ESD and LU) using
specific measurement methods, the product is
stressed in order to determine its performance in
terms of electrical sensitivity. For more details, re-
fer to the application note AN1181.
Absolute Maximum Ratings
Note:
1. Data based on characterization results, not tested in production.
13.7.3.2 Static Latch-Up
Electrical Sensitivities
128/159
V
V
LU: 3 complementary static tests are required
on 6 parts to assess the latch-up performance.
A supply overvoltage (applied to each power
supply pin) and a current injection (applied to
Symbol
Symbol
ESD(HBM)
ESD(MM)
LU
Electro-static discharge voltage
(Human Body Model)
Electro-static discharge voltage
(Machine Model)
Static latch-up class
Parameter
Ratings
T
T
T
T
A
A
A
A
=+25°C
=+25°C
=+25°C
=+85°C
13.7.3.1 Electro-Static Discharge (ESD)
Electro-Static Discharges (a positive then a nega-
tive pulse separated by 1 second) are applied to
the pins of each sample according to each pin
combination. The sample size depends on the
number of supply pins in the device (3 parts*(n+1)
supply pin). Two models can be simulated: Human
Body Model and Machine Model. This test con-
forms to the JESD22-A114A/A115A standard.
each input, output and configurable I/O pin) are
performed on each sample. This test conforms
to the EIA/JESD 78 IC latch-up standard. For
more details, refer to the application note
AN1181.
Conditions
Conditions
Maximum value
8000
400
Class
A
A
1)
Unit
V

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