MC68HC908GP32CP Freescale Semiconductor, MC68HC908GP32CP Datasheet - Page 115

• Manufacturer Part Number: MC68HC908GP32CP
• Description: IC MCU 8MHZ 32K FLASH 40-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GP32CP

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• For Use With: M68EVB908GP32 - BOARD EVALUATION FOR HC908GP32
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

7.4.6 Programming the PLL
MC68HC908GP32
MOTOROLA
NOTE:
•
MC68HC08GP32
The following conditions apply when in manual mode:
The following procedure shows how to program the PLL.
The round function in the following equations means that the real
number should be rounded to the nearest integer number.
1. Choose the desired bus frequency, f
2. Calculate the desired VCO frequency (four times the desired bus
3. Choose a practical PLL (crystal) reference frequency, f
•
•
•
•
•
ACQ is a writable control bit that controls the mode of the filter.
Before turning on the PLL in manual mode, the ACQ bit must be
clear.
Before entering tracking mode (ACQ = 1), software must wait a
given time, t
Specifications.), after turning on the PLL by setting PLLON in the
PLL control register (PCTL).
Software must wait a given time, t
before selecting the PLL as the clock source to CGMOUT
(BCS = 1).
The LOCK bit is disabled.
CPU interrupts from the CGMC are disabled.
frequency).
the reference clock divider, R. Typically, the reference crystal is
32.768 kHz and R = 1.
Frequency errors to the PLL are corrected at a rate of f
stability and lock time reduction, this rate must be as fast as
possible. The VCO frequency must be an integer multiple of this
rate. The relationship between the VCO frequency, f
reference frequency, f
—
Rev. 6
Clock Generator Module (CGMC)
ACQ
(See
f
VCLKDES
f
VCLK
RCLK
7.9 Acquisition/Lock Time
=
, is
=
2
----------- f
P
R
4 f
N
×
(
AL
BUSDES
RCLK
, after entering tracking mode
BUSDES
Clock Generator Module (CGMC)
)
.
Functional Description
VCLK
Technical Data
RCLK
RCLK
, and the
/R. For
, and
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