MC68HC908GR8CP Freescale Semiconductor, MC68HC908GR8CP Datasheet - Page 168

• Manufacturer Part Number: MC68HC908GR8CP
• Description: IC MCU FLASH 8BIT 8MHZ 4K 28-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GR8CP

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 17
• Program Memory Size: 7.5KB (7.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

External Interrupt (IRQ)
12.4 Functional Description
Technical Data
168
A logic 0 applied to the external interrupt pin can latch a CPU interrupt
request.
Interrupt signals on the IRQ1 pin are latched into the IRQ latch. An
interrupt latch remains set until one of the following actions occurs:
The external interrupt pin is falling-edge-triggered and is software-
configurable to be either falling-edge or falling-edge and low-level-
triggered. The MODE bit in the INTSCR controls the triggering sensitivity
of the IRQ1 pin.
When an interrupt pin is edge-triggered only, the interrupt remains set
until a vector fetch, software clear, or reset occurs.
When an interrupt pin is both falling-edge and low-level-triggered, the
interrupt remains set until both of the following occur:
The vector fetch or software clear may occur before or after the interrupt
pin returns to logic 1. As long as the pin is low, the interrupt request
remains pending. A reset will clear the latch and the MODE control bit,
thereby clearing the interrupt even if the pin stays low.
When set, the IMASK bit in the INTSCR mask all external interrupt
requests. A latched interrupt request is not presented to the interrupt
priority logic unless the IMASK bit is clear.
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Vector fetch — A vector fetch automatically generates an interrupt
acknowledge signal that clears the latch that caused the vector
fetch.
Software clear — Software can clear an interrupt latch by writing
to the appropriate acknowledge bit in the interrupt status and
control register (INTSCR). Writing a logic 1 to the ACK bit clears
the IRQ latch.
Reset — A reset automatically clears the interrupt latch.
Vector fetch or software clear
Return of the interrupt pin to logic 1
Figure 12-1
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External Interrupt (IRQ)
shows the structure of the IRQ module.
MC68HC908GR8 — Rev 4.0
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