MC68HC908GR8CP Freescale Semiconductor, MC68HC908GR8CP Datasheet - Page 238

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MC68HC908GR8CP

Manufacturer Part Number
MC68HC908GR8CP
Description
IC MCU FLASH 8BIT 8MHZ 4K 28-DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC68HC908GR8CP

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
17
Program Memory Size
7.5KB (7.5K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Serial Communications Interface (SCI)
18.5.2.2 Character Transmission
18.5.2.3 Break Characters
Technical Data
238
During an SCI transmission, the transmit shift register shifts a character
out to the PE2/TxD pin. The SCI data register (SCDR) is the write-only
buffer between the internal data bus and the transmit shift register. To
initiate an SCI transmission:
At the start of a transmission, transmitter control logic automatically
loads the transmit shift register with a preamble of logic 1s. After the
preamble shifts out, control logic transfers the SCDR data into the
transmit shift register. A logic 0 start bit automatically goes into the least
significant bit position of the transmit shift register. A logic 1 stop bit goes
into the most significant bit position.
The SCI transmitter empty bit, SCTE, in SCS1 becomes set when the
SCDR transfers a byte to the transmit shift register. The SCTE bit
indicates that the SCDR can accept new data from the internal data bus.
If the SCI transmit interrupt enable bit, SCTIE, in SCC2 is also set, the
SCTE bit generates a transmitter CPU interrupt request.
When the transmit shift register is not transmitting a character, the
PE2/TxD pin goes to the idle condition, logic 1. If at any time software
clears the ENSCI bit in SCI control register 1 (SCC1), the transmitter and
receiver relinquish control of the port E pins.
Writing a logic 1 to the send break bit, SBK, in SCC2 loads the transmit
shift register with a break character. A break character contains all logic
0s and has no start, stop, or parity bit. Break character length depends
on the M bit in SCC1. As long as SBK is at logic 1, transmitter logic
1. Enable the SCI by writing a logic 1 to the enable SCI bit (ENSCI)
2. Enable the transmitter by writing a logic 1 to the transmitter enable
3. Clear the SCI transmitter empty bit by first reading SCI status
4. Repeat step 3 for each subsequent transmission.
Freescale Semiconductor, Inc.
For More Information On This Product,
in SCI control register 1 (SCC1).
bit (TE) in SCI control register 2 (SCC2).
register 1 (SCS1) and then writing to the SCDR.
Serial Communications Interface (SCI)
Go to: www.freescale.com
MC68HC908GR8 — Rev 4.0
MOTOROLA

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