MC68HC711K4CFN4 Freescale Semiconductor, MC68HC711K4CFN4 Datasheet - Page 22

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MC68HC711K4CFN4

Manufacturer Part Number
MC68HC711K4CFN4
Description
IC MCU 24K OTP 4MHZ 84-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC711K4CFN4

Core Processor
HC11
Core Size
8-Bit
Speed
4MHz
Connectivity
SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
62
Program Memory Size
24KB (24K x 8)
Program Memory Type
OTP
Eeprom Size
640 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
84-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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3.4 EEPROM
PPROG —EEPROM Programming Control
22
MOTOROLA
RESET:
The 640-byte EEPROM is initially located at $0D80 after reset, assuming EEPROM is enabled in the
memory map by the EEON bit in the CONFIG register. EEPROM can be placed at any 4-Kbyte bound-
ary ($xD80) by writing appropriate values to the INIT2 register. Note that EEPROM can be mapped so
that it contains the vector space. Refer to Figure 4. The MC68HC11K0, MC68HC11K3, MC68L11K0,
and MC68L11K3 have no EEPROM. Refer to the ordering information tables.
Programming and erasing the EEPROM is controlled by the PPROG register, and dependent upon the
block protect (BPROT) register value. An on-chip charge pump develops the high voltage required for
programming and erasing. When the frequency of the E clock is less than 1 MHz, select the internal
clock source to drive the EEPROM charge pump by writing one to the CSEL bit in the OPTION register.
The CONFIG register consists of a single EEPROM byte. Although the byte is not included in the 640-
byte EEPROM array, programming the CONFIG register requires the same procedure as any byte in
the array. The erased state of bits in the CONFIG register is logic one. Refer to the CONFIG register
description that follows this section.
The erased state of an EEPROM byte is $FF (all ones).
To erase the EEPROM, ensure that the proper bits of the BPROT register are cleared, then complete
the following steps using the PPROG register:
To program the EEPROM, ensure the proper bits of the BPROT register are cleared and use the
PPROG register to complete the following steps:
1. Set the ERASE, EELAT, and appropriate BYTE and ROW bits in PPROG register.
2. Write to the appropriate EEPROM address with any data. Row erase only requires a write to
3. Set the ERASE, EELAT, EEPGM, and appropriate BYTE and ROW bits in PPROG register.
4. Delay for 10 ms or more, as appropriate.
5. Clear the EEPGM bit in PPROG to turn off the programming voltage.
6. Clear the PPROG register to reconfigure the EEPROM address and data buses for normal op-
1. Set the EELAT bit in PPROG register.
2. Write data to the desired address.
3. Set EEPGM bit in PPROG.
4. Delay for 10 ms or more, as appropriate.
5. Clear the EEPGM bit in PPROG to turn off the programming voltage.
6. Clear the PPROG register to reconfigure the EEPROM address and data buses for normal op-
any location in the row. Bulk erase is done by writing to any location in the array.
eration.
eration.
ODD
Bit 7
0
Since it is possible to perform other operations while the EEPROM programming/
erase operation is in progress, it is common to start the operation and then return
to the main program until the 10 ms is completed. When the EELAT bit is set at the
beginning of a program/erase operation, the EEPROM is electronically removed
from the memory map; thus, it is not accessible during the program/erase cycle.
Care must be taken to ensure that EEPROM resources will not be needed by any
routines in the code during the 10 ms program/erase time.
EVEN
6
0
Freescale Semiconductor, Inc.
For More Information On This Product,
LVPI
5
0
Go to: www.freescale.com
BYTE
4
0
CAUTION
ROW
0
3
ERASE
2
0
EELAT
1
0
EEPGM
M68HC11 K Series
$003B
Bit 0
MC6HC11KTS/D
0

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