MC9S12DG128VPV Freescale Semiconductor, MC9S12DG128VPV Datasheet - Page 16

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MC9S12DG128VPV

Manufacturer Part Number
MC9S12DG128VPV
Description
IC MCU 128K FLASH 25MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12DG128VPV

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
PWM, WDT
Number Of I /o
91
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.25 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
112-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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MC9S12DT128B Device User Guide — V01.09
– Do not write or read BDLC registers (after reset: address range $00E8 - $00EF), if using a
– Do not write or read IIC registers (after reset: address range $00E0 - $00E7), if using a
– Do not write or read Byteflight registers (after reset: address range $0300 - $035F), if using a
Interrupts
– Fill the four CAN1 interrupt vectors ($FFA8 - $FFAF) according to your coding policies for
– Fill the BDLC interrupt vector ($FFC2, $FFC3) according to your coding policies for unused
– Fill the IIC interrupt vector ($FFC0, $FFC1) according to your coding policies for unused
– Fill the four Byteflight interrupt vectors ($FFA0 - $FFA7) according to your coding policies for
Ports
– The CAN1 pin functionality (TXCAN1, RXCAN1) is not available on port PM3 and PM2, if
– The BDLC pin functionality (TXB, RXB) is not available on port PM1 and PM0, if using a
– The IIC pin functionality (SCL, SCA) is not available on port PJ7 and PJ6, if using a derivative
– The Byteflight pin functionality (BF_PSLM, BF_PERR, BF_PROK, BF_PSYN, TX_BF,
Pins not available in 80 pin QFP package
– Port H
– Port J[1:0]
– Port K
derivative without BDLC (see Table 0-1).
derivative without IIC (see Table 0-1).
derivative without Byteflight registers (see Table 0-1).
unused interrupts, if using a derivative without CAN1 (see Table 0-1).
interrupts, if using a derivative without BDLC (see Table 0-1).
interrupts, if using a derivative without IIC (see Table 0-1).
unused interrupts, if using a derivative without Byteflight (see Table 0-1).
using a derivative without CAN1 (see Table 0-1).
derivative without BDLC (see Table 0-1).
without IIC (see Table 0-1).
RX_BF) is not available on port PM7, PM6, PM5, PM4, PM3 and PM2, if using a derivative
without Byteflight (see Table 0-1).
In order to avoid floating nodes the ports should be either configured as outputs by setting the
data direction register (DDRH at Base+$0262) to $FF, or enabling the pull resistors by writing
a $FF to the pull enable register (PERH at Base+$0264).
Port J pull-up resistors are enabled out of reset on all four pins (7:6 and 1:0). Therefore care must
be taken not to disable the pull enables on PJ[1:0] by clearing the bits PERJ1 and PERJ0 at
Base+$026C.
Port K pull-up resistors are enabled out of reset, i.e. Bit 7 = PUKE = 1 in the register PUCR at
Base+$000C. Therefore care must be taken not to clear this bit.
Freescale Semiconductor, Inc.
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