HD64F2636F20J Renesas Electronics America, HD64F2636F20J Datasheet - Page 107

IC H8S MCU FLASH 128K 128QFP

HD64F2636F20J

Manufacturer Part Number
HD64F2636F20J
Description
IC H8S MCU FLASH 128K 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2636F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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2.2.23 (1)
CMP (CoMPare)
Operation
Rd – (EAs), set/clear CCR
Assembly-Language Format
CMP.B <EAs>, Rd
Operand Size
Byte
Description
This instruction subtracts the source operand from the contents of an 8-bit register Rd (destination
operand) and sets or clears the condition code bits according to the result. The contents of the 8-bit
register Rd remain unchanged.
Available Registers
Rd: R0L to R7L, R0H to R7H
Rs: R0L to R7L, R0H to R7H
Operand Format and Number of States Required for Execution
Notes
Immediate
Register direct
Addressing
Mode
CMP (B)
Mnemonic
CMP.B
CMP.B
Operands
#xx:8, Rd
Rs, Rd
1st byte
A
1
rd
C
Condition Code
H: Set to 1 if there is a borrow at bit 3;
N: Set to 1 if the result is negative; otherwise
Z: Set to 1 if the result is zero; otherwise
V: Set to 1 if an overflow occurs; otherwise
C: Set to 1 if there is a borrow at bit 7;
2nd byte
rs
Instruction Format
otherwise cleared to 0.
cleared to 0.
cleared to 0.
cleared to 0.
otherwise cleared to 0.
IMM
I
Rev. 4.00 Feb 24, 2006 page 91 of 322
rd
UI H
Section 2 Instruction Descriptions
3rd byte
U
N
4th byte
REJ09B0139-0400
Z
V
Compare
States
No. of
C
1
1

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