MC908AZ60AMFUER Freescale Semiconductor, MC908AZ60AMFUER Datasheet - Page 196

• Manufacturer Part Number: MC908AZ60AMFUER
• Description: IC MCU 64K FLASH 8.4MHZ 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AZ60AMFUER

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8.4MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 52
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 15x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Serial Communications Interface (SCI)
RE — Receiver Enable Bit
RWU — Receiver Wakeup Bit
SBK — Send Break Bit
18.8.3 SCI Control Register 3
SCI control register 3:
196
Setting this read/write bit enables the receiver. Clearing the RE bit disables the receiver but does not
affect receiver interrupt flag bits. Reset clears the RE bit.
This read/write bit puts the receiver in a standby state during which receiver interrupts are disabled.
The WAKE bit in SCC1 determines whether an idle input or an address mark brings the receiver out
of the standby state and clears the RWU bit. Reset clears the RWU bit.
Setting and then clearing this read/write bit transmits a break character followed by a logic 1. The logic
1 after the break character guarantees recognition of a valid start bit. If SBK remains set, the
transmitter continuously transmits break characters with no 1s between them. Reset clears the SBK
bit.
•
•
1 = Receiver enabled
0 = Receiver disabled
1 = Standby state
0 = Normal operation
1 = Transmit break characters
0 = No break characters being transmitted
Stores the ninth SCI data bit received and the ninth SCI data bit to be transmitted.
Enables the following interrupts:
–
–
–
–
Receiver overrun interrupts
Noise error interrupts
Framing error interrupts
Parity error interrupts
Address:
Writing to the RE bit is not allowed when the enable SCI bit (ENSCI) is
clear. ENSCI is in SCI control register 1.
Do not toggle the SBK bit immediately after setting the SCTE bit. Toggling
SBK before the preamble begins causes the SCI to send a break character
instead of a preamble.
Reset:
Read:
Write:
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
$0015
Bit 7
R8
U
Figure 18-13. SCI Control Register 3 (SCC3)
= Unimplemented
T8
U
6
R
5
0
NOTE
NOTE
R
R
4
0
= Reserved
ORIE
3
0
NEIE
2
0
U = Unaffected
FEIE
1
0
Freescale Semiconductor
PEIE
Bit 0
0