DSP56311VF150 Freescale Semiconductor, DSP56311VF150 Datasheet - Page 66

• Manufacturer Part Number: DSP56311VF150
• Description: IC DSP 24BIT 150MHZ 196-BGA
• Manufacturer: Freescale Semiconductor
• Series: DSP563xxr
• Type: Fixed Pointr

Specifications of DSP56311VF150

• Interface: Host Interface, SSI, SCI
• Clock Rate: 150MHz
• Non-volatile Memory: ROM (576 B)
• On-chip Ram: 384kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.80V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 196-MAPBGA
• Device Core Size: 24b
• Format: Fixed Point
• Clock Freq (max): 150MHz
• Mips: 150
• Device Input Clock Speed: 150MHz
• Ram Size: 384KB
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (min): 1.7/1.7/3/3/3/3/3/3V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Package: 196MA-BGA
• Numeric And Arithmetic Format: Fixed-Point
• Maximum Speed: 150 MHz
• Device Million Instructions Per Second: 150 MIPS
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Packaging
3-6
Notes:
Ball
M10
M11
M12
No.
L11
L12
L13
L14
M1
M2
M3
M4
M5
M6
M7
M8
M9
1.
2.
GND
V
A3
A4
HA1, HA8, or PB9
HA2, HA9, or PB10
HA0, HAS/HAS, or PB8
V
H0, HAD0, or PB0
V
V
EXTAL
CLKOUT
BCLK
WR
RD
CCA
CCH
CCP
CCQH
Signal names are based on configured functionality. Most connections supply a single signal. Some connections provide a
signal with dual functionality, such as the MODx/IRQx pins that select an operating mode after RESET is deasserted but act as
interrupt lines during operation. Some signals have configurable polarity; these names are shown with and without overbars,
such as HAS/HAS. Some connections have two or more configurable functions; names assigned to these connections indicate
the function for a specific configuration. For example, connection N2 is data line H7 in non-multiplexed bus mode,
data/address line HAD7 in multiplexed bus mode, or GPIO line PB7 when the GPIO function is enabled for this pin. Unlike in
the TQFP package, most of the GND pins are connected internally in the center of the connection array and act as heat sink
for the chip. Therefore, except for GND
subsystems in the chip.
CLKOUT, BCLK, and BCLK are available only if the operating frequency is ≤ 100 MHz.
2
2
Signal Name
Table 3-1.
Ball
No.
M13
M14
N10
N11
N12
N13
N14
N1
N2
N3
N4
N5
N6
N7
N8
N9
DSP56311 Technical Data, Rev. 8
Signal List by Ball Number (Continued)
P
and GND
A1
A2
H6, HAD6, or PB6
H7, HAD7, or PB7
H4, HAD4, or PB4
H2, HAD2, or PB2
RESET
GND
AA3/RAS3
CAS
V
BCLK
BR
V
AA0/RAS0
A0
CCQL
CCC
P
2
P1
Signal Name
that support the PLL, other GND signals do not support individual
Ball
No.
P10
P11
P12
P13
P14
P1
P2
P3
P4
P5
P6
P7
P8
P9
NC
H5, HAD5, or PB5
H3, HAD3, or PB3
H1, HAD1, or PB1
PCAP
GND
AA2/RAS2
XTAL
V
TA
BB
AA1/RAS1
BG
NC
CCC
P1
Freescale Semiconductor
Signal Name