MSC7119VF1200 Freescale Semiconductor, MSC7119VF1200 Datasheet - Page 59

• Manufacturer Part Number: MSC7119VF1200
• Description: DSP 16BIT W/DDR CTRLR 400-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MSC711x StarCorer
• Type: Fixed Pointr

Specifications of MSC7119VF1200

• Interface: Host Interface, I²C, UART
• Clock Rate: 300MHz
• Non-volatile Memory: ROM (8 kB)
• On-chip Ram: 464kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.20V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: *
• Package / Case: 400-MAPBGA
• Device Core Size: 16b
• Clock Freq (max): 300MHz
• Mips: 300
• Device Input Clock Speed: 300MHz
• Ram Size: 256KB
• Operating Supply Voltage (typ): 1.2/2.5/3.3V
• Operating Supply Voltage (min): 1.14/2.38/3.14V
• Operating Supply Voltage (max): 1.26/2.63/3.47V
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 400
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

7
Table 36
Freescale Semiconductor
Revision
0
1
2
3
4
5
6
7
8
provides a revision history for this data sheet.
Revision History
Sep. 2005
Dec. 2005
Feb. 2006
Nov. 2006
Oct. 2005
Jun. 2007
Aug 2007
Oct 2005
Apr 2008
Date
• Initial public release.
• Added explanatory note to HDI16 timing table.
• Added information about signals GPIOB11, GPIOC11, GPIOD7, and GPIOD8 to the signal descriptions
• Added information about signals GPIOA16, GPIOA17, GPIOA27, GPIOA28, and GPIOA29 to signal
• Updated orderable part numbers.
• Updated Reference Manual reference to MSC711x Reference Manual.
• Updated arrows in Host DMA Writing Timing figure.
• Updated to new data sheet format. Reorganized and renumbered sections, figures, and tables.
• Added a note to clarify the definition of TCK timing 700 in new Table 31.
• Removed references to V
• The power-up and power-down sequences described in Section 3.2 starting on page 42 have been expanded
• Change the PLL filter resistor from 20 Ω to 2 Ω in Section 3.2.5.
and pinout location lists.
description and pinout location lists.
3.2.
to five possible design scenarios/cases. These cases replace the previously recommended
power-up/power-down sequence recommendations. Section 3.2 has been clarified by adding subsection
headings.
Table 36. Document Revision History
MSC7119 Data Sheet, Rev. 8
CCSYN
and V
CCSYN1
Description
in the new power supply design recommendation Section
Revision History
59