MC9S08RD32DWER Freescale Semiconductor, MC9S08RD32DWER Datasheet - Page 126

• Manufacturer Part Number: MC9S08RD32DWER
• Description: IC MCU 8BIT 32K FLASH 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08RD32DWER

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOIC (0.300", 7.50mm Width)
• Processor Series: S08RD
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI1, SPI1
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 2
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08RG60E
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Keyboard Interrupt (KBI) Block Description
A rising edge is detected when the input signal is seen as a logic 0 during one bus cycle and then a logic 1
during the next cycle.
The KBIMOD control bit can be set to reconfigure the detection logic so that it detects edges and levels.
In KBIMOD = 1 mode, the KBF status flag becomes set when an edge is detected (when one or more
enabled pins change from the deasserted to the asserted level while all other enabled pins remain at their
deasserted levels), but the flag is continuously set (and cannot be cleared) as long as any enabled keyboard
input pin remains at the asserted level. When the MCU enters stop mode, the synchronous edge-detection
logic is bypassed (because clocks are stopped). In stop mode, KBI inputs act as asynchronous
level-sensitive inputs so they can wake the MCU from stop mode.
9.3.3
KBI Interrupt Controls
The KBF status flag becomes set (1) when an edge event has been detected on any KBI input pin. If
KBIE = 1 in the KBIxSC register, a hardware interrupt will be requested whenever KBF = 1. The KBF flag
is cleared by writing a 1 to the keyboard acknowledge (KBACK) bit.
When KBIMOD = 0 (selecting edge-only operation), KBF is always cleared by writing 1 to KBACK.
When KBIMOD = 1 (selecting edge-and-level operation), KBF cannot be cleared as long as any keyboard
input is at its asserted level.
9.4
KBI Registers and Control Bits
This section provides information about all registers and control bits associated with the KBI modules.
Refer to the direct-page register summary in the
Memory
chapter of this data sheet for the absolute address
assignments for all KBI registers. This section refers to registers and control bits only by their names. A
Freescale-provided equate or header file is used to translate these names into the appropriate absolute
addresses.
Some MCU systems have more than one KBI, so register names include placeholder characters to identify
which KBI is being referenced. For example, KBIxSC refers to the KBIx status and control register and
KBI2SC is the status and control register for KBI2.
MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
126
Freescale Semiconductor