1321XDSK-BDM Freescale Semiconductor, 1321XDSK-BDM Datasheet - Page 17

KIT STARTER DEV 1321X W/USB

1321XDSK-BDM

Manufacturer Part Number
1321XDSK-BDM
Description
KIT STARTER DEV 1321X W/USB
Manufacturer
Freescale Semiconductor
Type
Sensor Demor
Datasheets

Specifications of 1321XDSK-BDM

Frequency
2.4GHz
Wireless Frequency
2.4 GHz
Interface Type
SPI
Modulation
DSSS OQPSK
Security
128 bit AES
Operating Voltage
2 VDC to 3.4 VDC
Output Power
2 dBm
Antenna
F-Antenna
Operating Temperature Range
- 40 C to + 85 C
For Use With/related Products
MC1321x
Lead Free Status / RoHS Status
Contains lead / RoHS compliant by exemption
4.2
The 802.15.4 modem has two data transfer modes:
The Freescale 802.15.4 MAC software only supports the streaming mode of data transfer. For proprietary
applications, packet mode can be used to conserve MCU resources.
4.3
Figure 7
The 802.15.4 modem adds a four-byte preamble, a one-byte Start of Frame Delimiter (SFD), and a
one-byte Frame Length Indicator (FLI) before the data. A Frame Check Sequence (FCS) is calculated and
appended to the end of the data.
4.4
In the receive signal path, the RF input is converted to low IF In-phase and Quadrature (I & Q) signals
through two down-conversion stages. A Clear Channel Assessment (CCA) can be performed based upon
the baseband energy integrated over a specific time interval. The digital back end performs Differential
Chip Detection (DCD), the correlator “de-spreads” the Direct Sequence Spread Spectrum (DSSS) Offset
QPSK (O-QPSK) signal, determines the symbols and packets, and detects the data.
The preamble, SFD, and FLI are parsed and used to detect the payload data and FCS (which are stored in
RAM in Packet Mode). A two-byte FCS is calculated on the received data and compared to the FCS value
appended to the transmitted data, which generates a Cyclical Redundancy Check (CRC) result. A
parameter of received energy during the reception called the Link Quality Indicator is measured over a 64
µs period after the packet preamble and stored in an SPI register.
If the 802.15.4 modem is in Packet Mode, the data is stored in RAM and processed as an entire packet.
The MCU is notified that an entire packet has been received via an interrupt.
If the 802.15.4 modem is in streaming mode, the MCU is notified by a recurring interrupt on a
word-by-word basis.
Figure 8
about -57 dBm input power which is well above 802.15.4 Standard requirements.
Freescale Semiconductor
1. Packet Mode — Data is buffered in on-chip RAM
2. Streaming Mode — Data is processed word-by-word
shows CCA reported power level versus input power. Note that CCA reported power saturates at
shows the packet structure of the 802.15.4 modem. Payloads of up to 125 bytes are supported.
Data Transfer Modes
Packet Structure
Receive Path Description
4 bytes
Preamble
1 byte
SFD
Figure 7. 802.15.4 modem Packet Structure
MC13211/212/213 Technical Data, Rev. 1.8
1 byte
FLI
125 bytes maximum
Payload Data
2 bytes
FCS
17

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