MRF89XA-I/MQ Microchip Technology, MRF89XA-I/MQ Datasheet - Page 40

• Manufacturer Part Number: MRF89XA-I/MQ
• Description: TXRX ISM SUB-GHZ ULP 32QFN
• Manufacturer: Microchip Technology

Specifications of MRF89XA-I/MQ

• Package / Case: 32-WFQFN Exposed Pad
• Frequency: 863MHz ~ 870MHz, 902MHz ~ 928MHz, 950MHz ~ 960MHz
• Data Rate - Maximum: 200kbps
• Modulation Or Protocol: FSK, OOK
• Applications: ISM
• Power - Output: 12.5dBm
• Sensitivity: -113dBm
• Voltage - Supply: 2.1 V ~ 3.6 V
• Current - Receiving: 3mA
• Current - Transmitting: 25mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 863 MHz to 870 MHz, 902 MHz to 928 MHz, 950 MHz to 960 MHz
• Interface Type: SPI
• Noise Figure: - 112 dBc
• Output Power: - 8.5 dBm, + 12.5 dBm
• Operating Supply Voltage: 2.1 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Data Rate: 256 Kbps
• Maximum Supply Current: 25 mA
• Minimum Operating Temperature: - 40 C
• Modulation: FSK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

2.15
2.15.1
REGISTER 2-14:
DS70622B-page 40
MRF89XA
bit 7
R = Readable bit
-n = Value at POR
r = Reserved
bit 7-6
bit 5-4
Note 1: This mode is also available in Stand-by mode.
R/W-0
IRQ0RXS<1:0>
2: PLREADY = Payload ready
3: ADRSMATCH = Address Match
Interrupt Configuration Registers
FIFO TRANSMIT AND RECEIVE
INTERRUPT REQUEST
CONFIGURATION REGISTER
DETAILS
IRQ0RXS<1:0>: IRQ0 Receive Stand-by bits
These bits control the IRQ0 source in Receive and Stand-by modes:
If DMODE1:DMODE0 = 00
11 = SYNC
10 = SYNC
01 = RSSI
00 = Sync (default)
If DMODE1:DMODE0 = 01
11 = SYNC
10 = FIFOEMPTY
01 = WRITEBYTE
00 = - (default)
If DMODE1:DMODE0 = 1x
11 = SYNC or ARDSMATCH
10 = FIFOEMPTY
01 = WRITEBYTE
00 = PLREADY
IRQ1RXS<1:0>: IRQ1 Receive Stand-by bits
These bits control the IRQ1 source in Receive and Stand-by modes:
If DMODE1:DMODE0 = 00
xx = DCLK
If DMODE1:DMODE0 = 01
11 = FIFO_THRESHOLD
10 = RSSI
01 = FIFOFULL
00 = - (default)
If DMODE1:DMODE0 = 1x
11 = FIFO_THRESHOLD
10 = RSSI
01 = FIFOFULL
00 = CRCOK (default)
R/W-0
FTXRXIREG: FIFO TRANSMIT AND RECEIVE INTERRUPT REQUEST
CONFIGURATION REGISTER (ADDRESS:0x0D) (POR:0x00)
W = Writable bit
‘1’ = Bit is set
(2)
(1)
(1)
R/W-0
(1)
(1)
(default)
IRQ1RXS<1:0>
(1)
(1)
(3)
Continuous Mode (default)
Buffer Mode
Packet Mode
Continuous Mode (default)
Buffer Mode
Packet Mode
(if address filtering is enabled)
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
IRQ1TX
R/W-0
FIFOFULL
R/W-0
© 2010 Microchip Technology Inc.
x = Bit is unknown
FIFOEMPTY
R/W-0
FOVRRUN
R/W-0
bit 0