MRF89XA-I/MQ Microchip Technology, MRF89XA-I/MQ Datasheet - Page 86

• Manufacturer Part Number: MRF89XA-I/MQ
• Description: TXRX ISM SUB-GHZ ULP 32QFN
• Manufacturer: Microchip Technology

Specifications of MRF89XA-I/MQ

• Package / Case: 32-WFQFN Exposed Pad
• Frequency: 863MHz ~ 870MHz, 902MHz ~ 928MHz, 950MHz ~ 960MHz
• Data Rate - Maximum: 200kbps
• Modulation Or Protocol: FSK, OOK
• Applications: ISM
• Power - Output: 12.5dBm
• Sensitivity: -113dBm
• Voltage - Supply: 2.1 V ~ 3.6 V
• Current - Receiving: 3mA
• Current - Transmitting: 25mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 863 MHz to 870 MHz, 902 MHz to 928 MHz, 950 MHz to 960 MHz
• Interface Type: SPI
• Noise Figure: - 112 dBc
• Output Power: - 8.5 dBm, + 12.5 dBm
• Operating Supply Voltage: 2.1 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Data Rate: 256 Kbps
• Maximum Supply Current: 25 mA
• Minimum Operating Temperature: - 40 C
• Modulation: FSK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

3.11.0.1
Two packet formats are supported: Fixed length and
Variable length, which are selected by the PKTLENF bit
(PKTCREG<7>). The maximum size of the payload is
limited by the size of the FIFO selected (16, 32, 48 or
64 bytes).
3.11.0.2
In applications where the packet length is fixed in
advance, this mode of operation may be useful to min-
imize RF overhead (no length byte field is required). All
nodes, whether TX only, RX only, or TX/RX will be
programmed with the same packet length value.
FIGURE 3-26:
DS70622B-page 86
MRF89XA
Packet Format
Fixed Length Packet Format
1 to 4 bytes
Preamble
FIXED LENGTH PACKET FORMAT
Optional User provided fields which are part of the payload
Message part of the payload
Fields added by the packet handler in TX and processed and removed in RX
1 to 4 bytes
Sync Word
Address
Preliminary
byte
CRC checksum calculation
Optional DC free data coding
Payload/FIFO
0 to (FIFO size) bytes
The length of the payload is set by the PLDPLEN<6:0>
bits (PLOADREG<6:0) and is limited by the size of the
FIFO selected. The length stored in this register relates
only to the payload, which includes the message and
the optional address byte. In this mode, the payload
must contain at least one byte (that is, address or
message).
A fixed length packet frame format is illustrated in
Figure 3-26, which contains the following fields:
• Preamble (1010...)
• Sync word (Network ID)
• Optional Address byte (Node ID)
• Message data
• Optional 2-bytes CRC checksum
Message
© 2010 Microchip Technology Inc.
2-bytes
CRC