AT86RF231-ZUR Atmel, AT86RF231-ZUR Datasheet - Page 105

• Manufacturer Part Number: AT86RF231-ZUR
• Description: IC RADIO TXRX 2.4GHZ 32-VQFN
• Manufacturer: Atmel

Specifications of AT86RF231-ZUR

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee, 6LoWPAN, RF4CE, SP100, WirelessHART™, ISM
• Applications: Industrial Monitoring and Control, Wireless Alarm and Security Systems
• Power - Output: -17dBm ~ 3dBm
• Sensitivity: -101dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.3mA
• Current - Transmitting: 14mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 2405 MHz to 2480 MHz
• Interface Type: SPI
• Noise Figure: 6 dB
• Output Power: 20 dB
• Operating Supply Voltage: 2.5 V, 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 12.3 mA
• Minimum Operating Temperature: - 40 C
• Modulation: OQPSK
• Protocol Supported: 802.15.4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 9-3.
9.2.5
8111C–MCU Wireless–09/09
Bit
+0x05
Read/Write
Reset Value
TRX_STATE
SLP_TR
PA buffer
PA
Modulation
Register Description
PLL_ON
TX Power Ramping
R/W
7
1
PA_BUF_LT
0
When using an external RF front-end (refer to
may be required to adjust the startup time of the external PA relative to the internal building
blocks to optimize the overall PSD. This can be achieved using register bits PA_BUF_LT and
PA_LT.
Register 0x05 (PHY_TX_PWR):
This register controls the output power and the ramping of the transmitter.
• Bit [7:6] - PA_BUF_LT
These register bits control the enable lead time of the internal PA buffer relative to the enable
time of the internal PA. This time is further used to derive a control signal for an external RF
front-end to switch between receive and transmit, for details refer to
Table 9-2.
R/W
Register Bits
PA_BUF_LT
6
1
2
R/W
5
0
4
PA Buffer Enable Time Relative to the PA
PA_LT
6
R/W
4
0
Value
0
1
2
3
8
R/W
3
0
BUSY_TX
10
PA_BUF_LT
Section 11.5 “RX/TX Indicator” on page
R/W
2
0
12
TX_PWR
PA Buffer Lead Time [µs]
14
R/W
PA_LT
1
0
0
2
4
6
Section
16
1 1
AT86RF231
0
R/W
11.5.
0
0
1 1
18
0 0
Length [µs]
PHY_TX_PWR
1 1
147) it
105