AT86RF231-ZUR Atmel, AT86RF231-ZUR Datasheet - Page 154

• Manufacturer Part Number: AT86RF231-ZUR
• Description: IC RADIO TXRX 2.4GHZ 32-VQFN
• Manufacturer: Atmel

Specifications of AT86RF231-ZUR

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee, 6LoWPAN, RF4CE, SP100, WirelessHART™, ISM
• Applications: Industrial Monitoring and Control, Wireless Alarm and Security Systems
• Power - Output: -17dBm ~ 3dBm
• Sensitivity: -101dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.3mA
• Current - Transmitting: 14mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 2405 MHz to 2480 MHz
• Interface Type: SPI
• Noise Figure: 6 dB
• Output Power: 20 dB
• Operating Supply Voltage: 2.5 V, 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 12.3 mA
• Minimum Operating Temperature: - 40 C
• Modulation: OQPSK
• Protocol Supported: 802.15.4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

11.8
11.8.1
11.8.2
8111C–MCU Wireless–09/09
Bit
+0x0C
Read/Write
Reset Value
Dynamic Frame Buffer Protection
Overview
Register Description
RX_SAFE_MODE
R/W
7
0
The AT86RF231 continues the reception of incoming frames as long as it is in any receive state.
When a frame was successfully received and stored into the Frame Buffer, the following frame
will overwrite the Frame Buffer content again.
To relax the timing requirements for a Frame Buffer read access the Dynamic Frame Buffer Pro-
tection prevents that a new valid frame passes to the Frame Buffer until a Frame Buffer read
access has ended (indicated by /SEL = H, refer to
A received frame is automatically protected against overwriting:
The Dynamic Frame Buffer Protection is enabled, if register bit RX_SAFE_MODE (register
0x0C, TRX_CTRL_2) is set and the transceiver state is RX_ON or RX_AACK_ON.
Note that Dynamic Frame Buffer Protection only prevents write accesses from the air interface -
not from the SPI interface. A Frame Buffer or SRAM write access may still modify the Frame
Buffer content.
Register 0x0C (TRX_CTRL_2):
The TRX_CTRL_2 register is a multi purpose register to control various settings of the radio
transceiver.
• Bit 7 - RX_SAFE_MODE
If this bit is set Dynamic Frame Buffer Protection is enabled:
Table 11-17. Dynamic Frame Buffer Protection Mode
Note:
This operation mode is independent of the setting of register bits RX_PDT_LEVEL, refer to
tion 9.1.3 “Configuration” on page
• Bit [6:2] - Reserved
• Bit [1:0] - OQPSK_DATA_RATE
Refer to
Register Bit
RX_SAFE_MODE
• in Basic Operating Mode, if its FCS is valid
• in Extended Operating Mode, if an IRQ_3 (TRX_END) is generated
6
R
0
1. Dynamic Frame Buffer Protection is released with the rising edge of pin23 (/SEL) of a Frame
Section 11.3 “High Data Rate Modes” on page
Buffer read access, see
ceiver state changing from RX_ON or RX_AACK_ON to another state.
5
R
0
(1)
Reserved
Value
0
1
4
R
0
Description
Disable Dynamic Frame Buffer Protection
Enable Dynamic Frame Buffer Protection
Section 6.2.2 “Frame Buffer Access Mode” on page
102.
3
R
0
2
R
0
Section 6.2 “SPI Protocol” on page
137.
R/W
1
0
OQPSK_DATA_RATE
R/W
0
AT86RF231
0
20, or radio trans-
TRX_CTRL_2
19).
Sec-
154