LRIS2K-A1S/1GE STMicroelectronics, LRIS2K-A1S/1GE Datasheet

IC MEMORY TAG 64BIT UID ADH ANT

LRIS2K-A1S/1GE

Manufacturer Part Number
LRIS2K-A1S/1GE
Description
IC MEMORY TAG 64BIT UID ADH ANT
Manufacturer
STMicroelectronics
Series
LRIS2Kr
Datasheet

Specifications of LRIS2K-A1S/1GE

Rf Type
Read / Write
Frequency
13.56MHz
Features
ISO15693, ISO18000-3, 2048-bits
Package / Case
76mm x 45mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-5534-2
Features
October 2010
ISO 15693 standard fully compliant
ISO 18000-3 Mode 1 standard fully compliant
13.56 MHz ±7 kHz carrier frequency
To tag: 10% or 100% ASK modulation using
1/4 (26 Kbit/s) or 1/256 (1.6 Kbit/s) pulse
position coding
From tag: Load modulation using Manchester
coding with 423 kHz and 484 kHz subcarriers
in Low (6.6 Kbit/s) or High (26 Kbit/s) data rate
mode. Supports the 53 Kbit/s data rate with
Fast commands
Internal tuning capacitor 21 pF
1 000 000 Erase/Write cycles (minimum)
40 year data retention (minimum)
2048-bits EEPROM with Block Lock feature
64-bit unique identifier (UID)
Electrical article surveillance (EAS) capable
(software controlled)
Kill function
Multipassword protection
Read & Write (block of 32 bits)
5 ms programming time
2048-bit EEPROM tag IC at 13.56 MHz, with 64-bit UID and
Password, ISO15693 and ISO18000-3 Mode 1 compliant
Doc ID 13888 Rev 8
Sawn Bumped Wafer
LRIS2K
www.st.com
1/98
1

Related parts for LRIS2K-A1S/1GE

LRIS2K-A1S/1GE Summary of contents

Page 1

... EEPROM with Block Lock feature ■ 64-bit unique identifier (UID) ■ Electrical article surveillance (EAS) capable (software controlled) ■ Kill function ■ Multipassword protection ■ Read & Write (block of 32 bits) ■ programming time October 2010 Sawn Bumped Wafer Doc ID 13888 Rev 8 LRIS2K 1/98 www.st.com 1 ...

Page 2

... Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 1.2 Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 1.3 Initial dialogue for vicinity cards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 1.3.1 1.3.2 1.3.3 2 LRIS2K block security . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3 Example of LRIS2K security protection . . . . . . . . . . . . . . . . . . . . . . . . 17 4 Communication signal from VCD to LRIS2K . . . . . . . . . . . . . . . . . . . . 18 5 Data rate and data coding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.1 Data coding mode: 1 out of 256 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.2 Data coding mode: 1 out of 4 ...

Page 3

... High data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 8.12 Low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 9 Unique identifier (UID Application family identifier (AFI Data storage format identifier (DSFID 11.1 CRC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 12 LRIS2K protocol description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 13 LRIS2K states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 13.1 Power-off state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 13.2 Ready state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 13.3 Quiet state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 13.4 Selected state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 14 Modes ...

Page 4

... Request parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 18 Request processing by the LRIS2K . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 19 Explanation of the possible cases . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 20 Inventory Initiated command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 21 Timing definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 21.1 t1: LRIS2K response delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 21.2 t2: VCD new request delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 21 VCD new request delay in the absence of a response from 3 the LRIS2K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 22 Commands codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 23 Inventory ...

Page 5

... LRIS2K 31 Lock AFI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 32 Write DSFID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 33 Lock DSFID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 34 Get System Info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 35 Get Multiple Block Security Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 36 Kill . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 37 Write Password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 38 Lock Password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 39 Present Password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 40 Fast Read Single Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 41 Fast Inventory Initiated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 42 Fast Initiate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 43 Inventory Initiated ...

Page 6

... Contents B.2 CRC calculation example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 Appendix C Application family identifier (AFI) (informative Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 6/98 Doc ID 13888 Rev 8 LRIS2K ...

Page 7

... Response data rates Table 11. UID format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 12. CRC transmission rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Table 13. VCD request frame format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Table 14. LRIS2K response frame format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Table 15. LRIS2K response depending on Request_flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Table 16. General request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Table 17. Definition of request_flags Table 18. Request_flags when Bit Table 19. Request_flags when Bit Table 20. ...

Page 8

... Table 88. Initiate request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 Table 89. Initiate Initiated response format Table 90. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 Table 91. AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 Table 92. DC characteristics Table 93. Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 Table 94. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 Table 95. CRC definition Table 96. AFI coding Table 97. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 8/98 Doc ID 13888 Rev 8 LRIS2K ...

Page 9

... Write Single Block frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . 59 Figure 43. Lock Block frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Figure 44. Select frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Figure 45. Reset to Ready frame exchange between VCD and LRIS2K Figure 46. Write AFI frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 Figure 47 ...

Page 10

... Get System Info frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . 71 Figure 51. Get Multiple Block Security Status frame exchange between VCD and LRIS2K . . . . . . . . 73 Figure 52. Kill frame exchange between VCD and LRIS2K Figure 53. Write Password frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . 77 Figure 54. Lock Password frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . . 79 Figure 55 ...

Page 11

... KHz and 484 kHz. Data are transferred from the LRIS2K at 6.6 Kbit/s in low data rate mode and 26 Kbit/s high data rate mode. The LRIS2K supports the 53 Kbit/s in high data rate mode in one subcarrier frequency at 423 kHz. ...

Page 12

... During a Write, the 32 bits of the block are replaced by the new 32-bit value. The LRIS2K also has a 64-bit block that is used to store the 64-bit unique identifier (UID). The UID is compliant with the ISO 15963 description, and its value is used during the anticollision sequence (Inventory) ...

Page 13

... The LRIS2K supports the following commands: ● Inventory, used to perform the anticollision sequence. ● Stay Quiet, used to put the LRIS2K in quiet mode, where it does not respond to any inventory command. ● Select, used to select the LRIS2K. After this command, the LRIS2K processes all Read/Write commands with Select_flag set. ● ...

Page 14

... Power transfer Power is transferred to the LRIS2K by radio frequency at 13.56 MHz via coupling antennas in the LRIS2K and the VCD. The RF operating field of the VCD is transformed on the LRIS2K antenna Voltage which is rectified, filtered and internally regulated. The amplitude modulation (ASK) on this received signal is demodulated by the ASK demodulator ...

Page 15

... LRIS2K can be individually protected by one out of three available passwords, and each block can also have Read/Write access conditions set. Each memory block of the LRIS2K is assigned with a Protect Status area including a Block Lock bit, two Password Control bits and two Read/Write protection bits as shown in ...

Page 16

... Present Password: The Present Password command is used to present one of the three passwords to the LRIS2K in order to modify the access rights of all the memory blocks linked to that password (Table the access rights remain activated until the tag is powered off or until a new Present Password command is issued ...

Page 17

... Table 7. LRIS2K block security protection after power-up Add 0 0 Protection: Standard, 4 Protection: Pswd 1, Table 8. LRIS2K block security protection after a valid presentation of password 1 Add 0 0 Protection: Standard, 4 Protection: Pswd 1, show the block security protections before and after a valid Present Table 7 shows blocks access rights of an LRIS2K after power-up. ...

Page 18

... Depending on the choice made by the VCD, a “pause” will be created as described in Figure 2 and Figure The LRIS2K is operational for any degree of modulation index from between 10% and 30%. Figure 2. 100% modulation waveform Table 9. 10% modulation parameters Symbol ...

Page 19

... LRIS2K Figure 3. 10% modulation waveform a Communication signal from VCD to LRIS2K tRFF tRFSFL tRFR b Doc ID 13888 Rev AI06655 t 19/98 ...

Page 20

... The data coding implemented in the LRIS2K uses pulse position modulation. Both data coding modes that are described in the ISO15693 are supported by the LRIS2K. The selection is made by the VCD and indicated to the LRIS2K within the start of frame (SOF). 5.1 Data coding mode: 1 out of 256 The value of one single byte is represented by the position of one pause. The position of the pause 256 successive time periods of 18.88 µ ...

Page 21

... LRIS2K Figure 5. Detail of a time period Pulse Modulated Carrier . . . . . . . Doc ID 13888 Rev 8 Data rate and data coding 9.44 µs 18.88 µ Time Period one of 256 AI06657 21/98 ...

Page 22

... Doc ID 13888 Rev 8 LRIS2K 9.44 µs 66.08 µs 9.44 µs AI06658 01 11 75.52µs AI06659 ...

Page 23

... The LRIS2K is ready to receive a new command frame from the VCD 311.5 µs (t sending a response frame to the VCD. The LRIS2K takes a power-up time of 0.1 ms after being activated by the powering field. After this delay, the LRIS2K is ready to receive a command frame from the VCD. ...

Page 24

... Data rate and data coding Figure 10. EOF for either data coding mode 24/98 9.44µs 9.44µs 37.76µs Doc ID 13888 Rev 8 LRIS2K AI06662 ...

Page 25

... Data rates The LRIS2K can respond using the low or the high data rate format. The selection of the data rate is made by the VCD using the second bit in the protocol header. It also supports the x2 mode available on all the Fast commands. ...

Page 26

... For the Fast commands, a logic 1 starts with an unmodulated time of 9.44 µs followed by 4 pulses of 423.75 kHz (f Figure 14. Logic 1, high data rate x2 26/98 /32) followed by an unmodulated time of C Figure 11. 37.76µs Figure 12. 18.88µs Figure 13. 37.76µs /32) as shown in Figure 14. C 18.88µs Doc ID 13888 Rev 8 LRIS2K ai12076 /32) followed ai12066 ai12077 ai12067 ...

Page 27

... LRIS2K 7.1.2 Low data rate A logic 0 starts with 32 pulses at 423.75 kHz (f 75.52 µs as shown in Figure 15. Logic 0, low data rate For the Fast commands, a logic 0 starts with 16 pulses at 423.75 kHz (f unmodulated time of 37.76 µs as shown in Figure 16. Logic 0, low data rate x2 A logic 1 starts with an unmodulated time of 75.52 µs followed by 32 pulses at 423.75 kHz ...

Page 28

... C Figure 21. For the Fast commands, the x2 mode is not available. 149.84µs /28) followed by 32 pulses at 423.75 kHz C Figure 22. For the Fast commands, the x2 mode is not available. 149.84µs Doc ID 13888 Rev 8 LRIS2K ai12074 ai12073 ai12072 ai12075 ...

Page 29

... Figure 24. Start of frame, high data rate, one subcarrier x2 Figure 23. 113.28µs /32), and a logic 1 that consists of an unmodulated time of C Figure 56.64µs Doc ID 13888 Rev 8 LRIS2K to VCD frames 37.76µs ai12078 24. 18.88µs ai12079 29/98 ...

Page 30

... LRIS2K to VCD frames 8.3 Low data rate The SOF comprises an unmodulated time of 226.56 µs, followed by 96 pulses at 423.75 kHz (f /32), and a logic 1 that consists of an unmodulated time of 75.52 µs followed by 32 pulses C at 423.75 kHz as shown in Figure 25. Start of frame, low data rate, one subcarrier For the Fast commands, the SOF comprises an unmodulated time of 113.28 µ ...

Page 31

... For the Fast commands, the x2 mode is not available. Figure 28. Start of frame, low data rate, two subcarriers /28), followed by 24 pulses at 423.75 kHz C Figure 27. 112.39µs 37.46µs /28), followed by 96 pulses at 423.75 kHz C Figure 28. 449.56µs Doc ID 13888 Rev 8 LRIS2K to VCD frames ai12082 149.84µs ai12083 31/98 ...

Page 32

... LRIS2K to VCD frames 8.7 EOF when using one subcarrier 8.8 High data rate The EOF comprises a logic 0 that includes 8 pulses at 423.75 kHz and an unmodulated time of 18.88 µs, followed by 24 pulses at 423.75 kHz (f 56.64 µs as shown in Figure 29. End of frame, high data rate, one subcarriers 37.76µ ...

Page 33

... For the Fast commands, the x2 mode is not available. Figure 34. End of frame, low data rate, two subcarriers 149.84µs Figure 33. 37.46µs 112.39µs Figure 34. Doc ID 13888 Rev 8 LRIS2K to VCD frames /32) and 27 pulses at 484.28 kHz C ai12088 /32) and 108 pulses at 484.28 kHz C 449.56µs ai12089 33/98 ...

Page 34

... Unique identifier (UID) 9 Unique identifier (UID) The LRIS2Ks are uniquely identified by a 64-bit Unique Identifier (UID). This UID complies with ISO/IEC 15963 and ISO/IEC 7816-6. The UID is a read-only code and comprises: ● 8 MSBs with a value of E0h ● The IC Manufacturer code of ST 02h bits (ISO/IEC 7816-6/AM1) ● ...

Page 35

... Application family identifier (AFI) The AFI (application family identifier) represents the type of application targeted by the VCD and is used to identify, among all the LRIS2Ks present, only the LRIS2Ks that meet the required application criteria. Figure 35. LRIS2K decision tree for AFI The AFI is programmed by the LRIS2K issuer (or purchaser) in the AFI register. Once programmed and Locked, it can no longer be modified ...

Page 36

... EOF. The CRC is calculated on all the bytes after the SOF up to the CRC field. Upon reception of a request from the VCD, the LRIS2K verifies that the CRC value is valid invalid, the LRIS2K discards the frame and does not answer to the VCD. ...

Page 37

... LRIS2K protocol description The Transmission protocol (or simply protocol) defines the mechanism used to exchange instructions and data between the VCD and the LRIS2K, in both directions based on the concept of “VCD talks first”. This means that an LRIS2K will not start transmitting unless it has received and properly decoded an instruction sent by the VCD. The protocol is based on an exchange of: ● ...

Page 38

... LRIS2K protocol description Figure 36. LRIS2K protocol timing Request VCD (Table LRIS2K Timing 38/98 frame 13) Response frame (Table 14 Doc ID 13888 Rev 8 Request frame (Table 13) Response frame (Table LRIS2K 14 ...

Page 39

... Table 15: LRIS2K response depending on 13.1 Power-off state The LRIS2K is in the Power-off state when it does not receive enough energy from the VCD. 13.2 Ready state The LRIS2K is in the Ready state when it receives enough energy from the VCD. When in the Ready state, the LRIS2K answers any request where the Select_flag is not set. ...

Page 40

... UID) Error (03h) Figure 37. LRIS2K state transition diagram Any other command where the Address_Flag is set AND where Inventory_Flag is not set 1. The intention of the state transition method is that only one LRIS2K should be in the selected state at a time. 40/98 Address_flag 1 Addressed ...

Page 41

... VCD as specified in the command description. Only LRIS2Ks in the Selected state answer a request where the Select_flag set to 1. The system design ensures in theory that only one LRIS2K can be in the Select state at a time. Doc ID 13888 Rev 8 ...

Page 42

... Request_flags F 15.1 Request_flags In a request, the “flags” field specifies the actions to be performed by the LRIS2K and whether corresponding fields are present or not. The flag field consists of eight bits. The bit 3 (Inventory_flag) of the request_flag defines the contents of the 4 MSBs (bits ...

Page 43

... Request_flags when Bit Bit No Bit 5 AFI_flag Bit 6 Nb_slots_flag Bit 7 Option_flag Bit 8 Level Request is executed by any LRIS2K according to the setting of 0 Address_flag (1) 1 Request is executed only by the LRIS2K in Selected state Request is not addressed. UID field is not present. The request is 0 executed by all LRIS2Ks. (1) Request is addressed ...

Page 44

... EOF Table 20. General response format S O Response_flags F 16.1 Response_flags In a request, the flags indicate how actions have been performed by the LRIS2K and whether corresponding fields are present or not. The request_flags consist of eight bits. Table 21. Definitions of response_flags Bit No Bit 1 Error_flag Bit 2 RFU ...

Page 45

... LRIS2K 16.2 Response error code If the Error_flag is set by the LRIS2K in the request, the Error code field is present and provides information about the error that occurred. Error codes not specified in Table 22. Response error code definition Error code 03h 0Fh 10h 11h 12h ...

Page 46

... Anticollision 17 Anticollision The purpose of the anticollision sequence is to inventory the LRIS2Ks present in the VCD field using their unique ID (UID). The VCD is the master of communications with one or several LRIS2Ks. It initiates LRIS2K communication by issuing the Inventory request. The LRIS2K sends its request in the determined slot or does not respond. ...

Page 47

... The first slot starts immediately after the reception of the request EOF. To switch to the next slot, the VCD sends an EOF. The following rules and restrictions apply: ● LRIS2K answer is detected, the VCD may switch to the next slot by sending an EOF, ● if one or more LRIS2K answers are detected, the VCD waits until the complete frame has been received before sending an EOF for switching to the next slot ...

Page 48

... Request processing by the LRIS2K 18 Request processing by the LRIS2K Upon reception of a valid request, the LRIS2K performs the following algorithm: ● NbS is the total number of slots (1 or 16) ● the current slot number (0 to 15) ● LSB (value, n) function returns the n Less Significant Bits of value ● ...

Page 49

... The VCD sends an Inventory request frame terminated by an EOF. The number of slots is 16. ● LRIS2K 1 transmits its request in Slot the only one to do so, therefore no collision occurs and its UID is received and registered by the VCD; ● The VCD sends an EOF in order to switch to the next slot. ...

Page 50

... Explanation of the possible cases Figure 39. Description of a possible anticollision sequence 50/98 Doc ID 13888 Rev 8 LRIS2K ...

Page 51

... LRIS2K 20 Inventory Initiated command The LRIS2K provides a special feature to improve the inventory time response of moving tags using the Initiate_flag value. This flag, controlled by the Initiate command, allows tags to answer to Inventory Initiated commands. For applications in which multiple tags are moving in front of a reader possible to miss tags using the standard inventory command ...

Page 52

... EOF from the LRIS2Ks. The EOF sent by the VCD may be either 10% or 100% modulated regardless of the modulation index used for transmitting the VCD request to the LRIS2K also the time after which the VCD may send a new request to the LRIS2K as described 2 in Figure 36: LRIS2K protocol ...

Page 53

... LRIS2K 22 Commands codes The LRIS2K supports the commands described in this section. Their codes are given in Table 26. Table 26. Command codes Command code standard 01h 02h 20h 21h 22h 25h 26h 27h 28h 29h 2Ah 2Bh 2Ch Function Inventory Stay Quiet Read Single Block ...

Page 54

... Inventory response format Response Response_ SOF flags 8 bits During an Inventory process, if the VCD does not receive an RF LRIS2K response, it waits a time t before sending an EOF to switch to the next slot request EOF sent by the VCD. ● If the VCD sends a 100% modulated EOF, the minimum value of t ...

Page 55

... LRIS2K 24 Stay Quiet Command code = 0x02 On receiving the Stay Quiet command, the LRIS2K enters the Quiet state and does NOT send back a request. There is NO response to the Stay Quiet command even if an error occurs. When in the Quiet state: ● the LRIS2K does not process any request if the Inventory_flag is set, ● ...

Page 56

... Read Single Block 25 Read Single Block On receiving the Read Single Block command, the LRIS2K reads the requested block and sends back its 32 bits value in the request. The Option_flag is supported and gives access to the protect status. Table 30. Read Single Block request format ...

Page 57

... LRIS2K Figure 41. Read Single Block frame exchange between VCD and LRIS2K VCD SOF LRIS2K Read Single Block EOF request <-t -> 1 Doc ID 13888 Rev 8 Read Single Block Read Single Block SOF EOF response 57/98 ...

Page 58

... Write Single Block 26 Write Single Block On receiving the Write Single Block command, the LRIS2K writes the data contained in the request to the requested block and reports whether the write operation was successful in the request. The Option_flag is supported. During the write cycle t Otherwise, the LRIS2K may not program correctly the data into the memory. The t equal × ...

Page 59

... LRIS2K Figure 42. Write Single Block frame exchange between VCD and LRIS2K Write Single VCD SOF Block request LRIS2K LRIS2K EOF Write Single Block <-t -> SOF 1 response <------------ t ------------>< Doc ID 13888 Rev 8 Write Single Block Write sequence when EOF error Write Single -> ...

Page 60

... Lock Block 27 Lock Block On receiving the Lock Block command, the LRIS2K permanently locks the selected block. During the write cycle t Otherwise, the LRIS2K may not lock correctly the memory block. The × 302µs. 1nom Table 37. Lock Single Block request format ...

Page 61

... LRIS2K Figure 43. Lock Block frame exchange between VCD and LRIS2K VCD SOF LRIS2K LRIS2K Lock Block EOF request <-t -> SOF 1 <------------ t ------------>< Doc ID 13888 Rev 8 Lock Block Lock Block Lock sequence when EOF response error Lock Block -> SOF 1 response EOF 61/98 ...

Page 62

... Select When receiving the Select command: ● if the UID is equal to its own UID, the LRIS2K enters or stays in the Selected state and sends a request. ● if the UID does not match its own, the selected LRIS2K returns to the Ready state and does not send a request. ...

Page 63

... LRIS2K 29 Reset to Ready On receiving a Reset to Ready command, the LRIS2K returns to the Ready state. In the Addressed mode, the LRIS2K answers an error code only if the UID is equal to its own UID. If not, no response is generated. Table 43. Reset to Ready request format Request Request_ SOF flags 8 bits Request parameter: ● ...

Page 64

... Write AFI 30 Write AFI On receiving the Write AFI request, the LRIS2K writes the AFI byte value into its memory. During the write cycle t Otherwise, the LRIS2K may not write correctly the AFI value into the memory. The t equal × 302 µs. ...

Page 65

... LRIS2K Figure 46. Write AFI frame exchange between VCD and LRIS2K VCD SOF LRIS2K LRIS2K Write AFI EOF request <-t -> SOF 1 <------------ t ------------>< Doc ID 13888 Rev 8 Write AFI Write AFI Write sequence EOF response when error Write AFI -> SOF 1 response EOF 65/98 ...

Page 66

... Lock AFI 31 Lock AFI On receiving the Lock AFI request, the LRIS2K locks the AFI value permanently. During the write cycle t Otherwise, the LRIS2K may not Lock correctly the AFI value in memory. The t equal × 302 µs. 1nom Table 49. Lock AFI request format ...

Page 67

... LRIS2K 32 Write DSFID On receiving the Write DSFID request, the LRIS2K writes the DSFID byte value into its memory. During the write cycle t Otherwise, the LRIS2K may not write correctly the DSFID value in memory. The t equal × 302 µs. 1nom Table 52. ...

Page 68

... Write DSFID Figure 48. Write DSFID frame exchange between VCD and LRIS2K VCD SOF LRIS2K LRIS2K 68/98 Write DSFID EOF request <-t -> SOF 1 <------------ t W Doc ID 13888 Rev 8 Write DSFID Write sequence when EOF response error Write DSFID ------------><- t -> SOF 1 response ...

Page 69

... LRIS2K 33 Lock DSFID On receiving the Lock DSFID request, the LRIS2K locks the DSFID value permanently. During the write cycle t Otherwise, the LRIS2K may not lock correctly the DSFID value in memory. The t equal × 302 µs. 1nom Table 55. Lock DSFID request format ...

Page 70

... DSFID value ● AFI value ● Memory size. The LRIS2K provides 64 blocks (3Fh byte (03h) ● IC Reference. Only the 6 MSB are significant. The product code of the LRIS2K is 00 1010 =10 b Table 60. Get System Info response format when Error_flag is set Response_ ...

Page 71

... LRIS2K Figure 50. Get System Info frame exchange between VCD and LRIS2K VCD SOF LRIS2K Get System Info EOF request <-t -> SOF Get System Info response EOF 1 Doc ID 13888 Rev 8 Get System Info 71/98 ...

Page 72

... Get Multiple Block Security Status When receiving the Get Multiple Block Security Status command, the LRIS2K sends back the block security status. The blocks are numbered from '00 to '3F' in the request and the value is minus one (–1) in the field. For example, a value of '06' in the “Number of blocks” ...

Page 73

... Error code as Error_flag is set: – 03h: Option not supported – 0Fh: other error Figure 51. Get Multiple Block Security Status frame exchange between VCD and LRIS2K VCD SOF LRIS2K Get Multiple Block EOF Security Status <-t -> SOF 1 Doc ID 13888 Rev 8 Get Multiple Block Security Status ...

Page 74

... LRIS2K returns an error response. During the comparison cycle equal to t 10%). Otherwise, the LRIS2K may not match the kill code correctly. The × 302 µs. After a successful Kill command, the LRIS2K is deactivated and does 1nom not interpret any other command. Table 65. ...

Page 75

... LRIS2K Figure 52. Kill frame exchange between VCD and LRIS2K VCD SOF Kill request EOF LRIS2K LRIS2K <-t -> SOF Kill response 1 <------------ t ------------>< Doc ID 13888 Rev 8 Kill Kill sequence when EOF error Kill -> SOF EOF 1 response 75/98 ...

Page 76

... Write Password 37 Write Password On receiving the Write Password command, the LRIS2K uses the data contained in the request to write the password and reports whether the operation was successful in the request. The Option_flag is supported. During the write cycle time, t Otherwise, the LRIS2K may not correctly program the data into the memory. The t equal × ...

Page 77

... LRIS2K Figure 53. Write Password frame exchange between VCD and LRIS2K VCD SOF LRIS2K LRIS2K Write Password EOF request <-t -> SOF 1 <------------ t ------------>< Doc ID 13888 Rev 8 Write Password Write Password Write sequence when EOF response error Write -> SOF Password 1 response EOF 77/98 ...

Page 78

... Lock Password 38 Lock Password On receiving the Lock Password command, the LRIS2K sets the access rights and permanently locks the selected block. The Option_flag is supported. RFU bit 8 of the request_flag is used to select either the memory area (bit 8 = ‘0’) or the password area (bit 8 = ‘1’). ...

Page 79

... LRIS2K Response parameter: ● Error code as Error_flag is set: – 10h: block address not available – 11h: block is locked – 14: block not locked Figure 54. Lock Password frame exchange between VCD and LRIS2K VCD SOF LRIS2K LRIS2K Lock Password EOF request <-t -> SOF 1 < ...

Page 80

... On receiving the Present Password command, the LRIS2K compares the requested password with the data contained in the request and reports whether the operation has been successful in the request. The Option_flag is supported. During the comparison cycle equal to t 10%) otherwise, the LRIS2K the Password value may not be correctly compared. The t time is equal ...

Page 81

... LRIS2K Figure 55. Present Password frame exchange between VCD and LRIS2K VCD SOF LRIS2K LRIS2K Present Password EOF request <-t -> SOF 1 <------------ t ------------>< Doc ID 13888 Rev 8 Present Password Present Password EOF sequence when error response Present -> SOF Password 1 response EOF 81/98 ...

Page 82

... Fast Read Single Block 40 Fast Read Single Block On receiving the Fast Read Single Block command, the LRIS2K reads the requested block and sends back its 32-bit value in the request. The Option_flag is supported. The data rate of the response is multiplied by 2. Table 78. ...

Page 83

... LRIS2K Figure 56. Fast Read Single Block frame exchange between VCD and LRIS2K VCD SOF LRIS2K Fast Read Single EOF Block request <-t -> SOF 1 Doc ID 13888 Rev 8 Fast Read Single Block Fast Read Single EOF Block response 83/98 ...

Page 84

... Fast Inventory Initiated Before receiving the Fast Inventory Initiated command, the LRIS2K must have received an Initiate or a Fast Initiate command in order to set the Initiate_ flag. If not, the LRIS2K does not answer to the Fast Inventory Initiated command. On receiving the Fast Inventory Initiated request, the LRIS2K runs the anticollision sequence ...

Page 85

... On receiving the Fast Initiate command, the LRIS2K sets the internal Initiate_flag and sends back a request. The command has to be issued in the Non Addressed mode only (Select_flag is reset to 0 and Address_flag is reset to 0 error occurs, the LRIS2K does not generate any answer. The Initiate_flag is reset after a power off of the LRIS2K. The data rate of the response is multiplied by 2 ...

Page 86

... Inventory Initiated Before receiving the Inventory Initiated command, the LRIS2K must have received an Initiate or a Fast Initiate command in order to set the Initiate_ flag. If not, the LRIS2K does not answer to the Inventory Initiated command. On receiving the Inventory Initiated request, the LRIS2K runs the anticollision sequence. ...

Page 87

... On receiving the Initiate command, the LRIS2K sets the internal Initiate_flag and sends back a request. The command has to be issued in the Non Addressed mode only (Select_flag is reset to 0 and Address_flag is reset to 0 error occurs, the LRIS2K does not generate any answer. The Initiate_flag is reset after a power off of the LRIS2K. ...

Page 88

... Electrostatic discharge voltage ESD 1. AEC-Q100-002 (compliant with JEDEC Std JESD22-A114A, C1=100 pF, R1=1500 Ohm, R2=500 Ohm) 2. Human body model. 3. Machine model. 88/98 Parameter Wafer (kept in its antistatic bag) UFDFPN8 (HBM) (1) (3) UFDFPN8 (MM) Doc ID 13888 Rev 8 LRIS2K Min. Max. Unit 15 25 °C 23 months – –7 7 ...

Page 89

... A 2. All timing measurements were performed on a reference antenna with the following characteristics: External size Number of turns: 6 Width of conductor Space between 2 conductors: 0.4 mm Value of the tuning capacitor (LRIS2K-SBN18) Value of the coil: 4.3 µH Tuning frequency: 13.8 MHz. (1) (2) Parameter Condition MI=(A-B)/(A+B) ...

Page 90

... Table 93. Operating conditions Symbol T A Figure 59 shows an ASK modulated signal, from the VCD to the LRIS2K. The test condition for the AC/DC parameters are: ● Close coupling condition with tester antenna (1mm) ● LRIS2K performance measured at the tag antenna Figure 59. LRIS2K synchronous timing, transmit and receive ...

Page 91

... Device type LRIS2K Package SBN18 = 180 µm ± 15 µm bumped and sawn wafer on 8-inch frame Tuning capacitance Customer code given For further information on any aspect of this device, please contact your nearest ST sales office. LRIS2K - Doc ID 13888 Rev 8 Part numbering SBN18 91/98 ...

Page 92

... LRIS2K is inventoried then store (LRIS2K_UID) else ; remember a collision was detected push(mask,address) endif next sub_address if stack_not_empty ...

Page 93

... CRC (informative) B.1 CRC error detection method The cyclic redundancy check (CRC) is calculated on all data contained in a message, from the start of the flags through to the end of data. The CRC is used from VCD to LRIS2K and from LRIS2K to VCD. Table 95. CRC definition CRC type ...

Page 94

... LSByte, then MSByte) } else // check CRC { if (current_crc_value == CHECK_VALUE) { printf ("Checked CRC is ok (0x%04X)\n", current_crc_value); } else { printf ("Checked CRC is NOT ok (0x%04X)\n", current_crc_value 94/98 current_crc_value = (current_crc_value >> current_crc_value = (current_crc_value >> 1); Doc ID 13888 Rev 8 LRIS2K ...

Page 95

... Application family identifier (AF (informative) The AFI (application family identifier) represents the type of application targeted by the VCD and is used to extract from all the LRIS2K present only the LRIS2K meeting the required application criteria programmed by the LRIS2K issuer (the purchaser of the LRIS2K). Once locked, it cannot be modified ...

Page 96

... UFDFPN8 package mechanical data updated and dimensions in inches rounded to four decimal digits instead of three in UFDFPN8 - 8-lead ultra thin fine pitch dual flat package no lead (MLP) mechanical data LRIS2K products are no longer delivered in A1 inlays and A6 and A7 antennas. 5 Table 94: Ordering information scheme ...

Page 97

... Section 41: Fast Inventory Inventory Initiated). Doc ID 13888 Rev 8 Revision history Changes map. modified. Table 5: Read / Write modified to include Table 7: LRIS2K block security and Table 8: LRIS2K block security 1. Section 25: Read Single Block. status. Section 27: Lock Block, Section 30: Write AFI, Section 32: Write DSFID, Section 33: Kill ...

Page 98

... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 98/98 Please Read Carefully: © 2010 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com Doc ID 13888 Rev 8 LRIS2K ...

Related keywords