NUC120VE3AN Nuvoton Technology Corporation of America, NUC120VE3AN Datasheet - Page 271

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NUC120VE3AN

Manufacturer Part Number
NUC120VE3AN
Description
IC MCU 32BIT 128KB FLASH 100LQFP
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro™r
Datasheets

Specifications of NUC120VE3AN

Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, LVD, POR, PS2, PWM, WDT
Number Of I /o
76
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Manufacturer
Quantity
Price
Part Number:
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Part Number:
NUC120VE3AN
Manufacturer:
Nuvoton Technology Corporation of America
Quantity:
10 000
I
Register
I2CSTATUS
Bits
[31:8]
[7:0]
2
C Status Register (I2CSTATUS )
31
23
15
7
NuMicro™ NUC100 Series Technical Reference Manual
Offset
I2C_BA+0x0C
Descriptions
Reserved
I2CSTATUS
30
22
14
6
I2CSTATUS[7:3]
R/W
R/W
Reserved
I
The status register of I
The three least significant bits are always 0. The five most significant bits contain the
status code. There are 26 possible status codes. When I2CSTATUS contains F8H, no
serial interrupt is requested. All other I2CSTATUS values correspond to defined I
states. When each of these states is entered, a status interrupt is requested (SI = 1). A
valid status code is present in I2CSTATUS one cycle after SI is set by hardware and is
still present one cycle after SI has been reset by software. In addition, states 00H
stands for a Bus Error. A Bus Error occurs when a START or STOP condition is
present at an illegal position in the formation frame. Example of illegal position are
during the serial transfer of an address byte, a data byte or an acknowledge bit.
2
C Status Register
29
21
13
5
Description
I
2
C Status Register
28
20
12
4
- 271 -
Reserved
Reserved
Reserved
2
C:
27
19
11
3
Publication Release Date: Oct 22, 2010
26
18
10
2
0
25
17
9
1
0
Revision V1.06
Reset Value
0x0000_0000
24
16
8
0
0
2
C

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