NUC120VE3AN Nuvoton Technology Corporation of America, NUC120VE3AN Datasheet - Page 346

• Manufacturer Part Number: NUC120VE3AN
• Description: IC MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro™r

Specifications of NUC120VE3AN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, LVD, POR, PS2, PWM, WDT
• Number Of I /o: 76
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

NuMicro™ NUC100 Series Technical Reference Manual
Burst Mode
SPI controller can switch to burst mode by setting TX_NUM bit field (SPI_CNTRL[9:8]) to 0x01. In
burst mode, SPI can transmit/receive two transactions in one transfer. The SPI burst mode
waveform is showed below:
Figure 5-54 Two Transactions in One Transfer (Burst Mode)
LSB First
The LSB bit (SPI_CNTRL[10]) defines the data transmission either from LSB or MSB firstly to
start to transmit/receive data.
Transmit Edge
The TX_NEG bit (SPI_CNTRL[2]) defines the data transmitted out either at negative edge or at
positive edge of serial clock SPICLK.
Receive Edge
The Rx_NEG bit (SPI_CNTRL[1]) defines the data received in either at negative edge or at
positive edge of serial clock SPICLK.
Publication Release Date: Dec. 22, 2010
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Revision V1.06