NUC120VE3AN Nuvoton Technology Corporation of America, NUC120VE3AN Datasheet - Page 481

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NUC120VE3AN

Manufacturer Part Number
NUC120VE3AN
Description
IC MCU 32BIT 128KB FLASH 100LQFP
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro™r
Datasheets

Specifications of NUC120VE3AN

Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, LVD, POR, PS2, PWM, WDT
Number Of I /o
76
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Part Number:
NUC120VE3AN
Manufacturer:
Nuvoton Technology Corporation of America
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[11]
[10]
[9]
[8]
[7:4]
[3]
[2]
[1]
NuMicro™ NUC100 Series Technical Reference Manual
RXFULL
RXTHF
RXOVF
RXUDF
Reserved
RIGHT
I2STXINT
I2SRXINT
Receive FIFO full
This bit reflect data words number in receive FIFO is 8
1 = Full
0 = Not full
This bit is read only.
Receive FIFO threshold flag
When data word(s) in receive FIFO is equal or higher than threshold value set in
RXTH[2:0] the RXTHF bit becomes to 1. It keeps at 1 till RXFIFO_LEVEL[3:0] less
than RXTH[1:0] after software read RXFIFO register.
1 = Data word(s) in FIFO is equal or higher than threshold level
0 = Data word(s) in FIFO is lower than threshold level
This bit is read only
Receive FIFO overflow flag
When receive FIFO is full and receive hardware attempt write to data into receive FIFO
then this bit is set to 1, data in 1st buffer is overwrote.
1 = Overflow occur
0 = No overflow occur
Software can write 1 to clear this bit to zero
Receive FIFO underflow flag
Read receive FIFO when it is empty, this bit set to 1 indicate underflow occur.
1 = Underflow occur
0 = No underflow occur
Software can write 1 to clear this bit to zero
Reserved
Right channel
This bit indicate current transmit data is belong to right channel
1 = Right channel
0 = Left channel
This bit is read only
I
1 = Transmit interrupt
0 = No transmit interrupt
This bit is read only
I
1 = Receive interrupt
0 = No receive interrupt
This bit is read only
2
2
S transmit interrupt
S receive interrupt
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Publication Release Date: Oct 22, 2010
Revision V1.06

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