NUC120VE3AN Nuvoton Technology Corporation of America, NUC120VE3AN Datasheet - Page 489

no-image

NUC120VE3AN

Manufacturer Part Number
NUC120VE3AN
Description
IC MCU 32BIT 128KB FLASH 100LQFP
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro™r
Datasheets

Specifications of NUC120VE3AN

Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, LVD, POR, PS2, PWM, WDT
Number Of I /o
76
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NUC120VE3AN
Manufacturer:
NuvoTon
Quantity:
280
Part Number:
NUC120VE3AN
Manufacturer:
Nuvoton Technology Corporation of America
Quantity:
10 000
5.16.4.4 Single-Cycle Scan Mode
In single-cycle scan mode, A/D conversion will sample and convert the specified channels once in
the sequence from the least to highest channel. Operations are as follows:
An example timing diagram for single-cycle scan on enabled channels (0, 2, 3 and 7) is shown as
below:
1.
2.
3.
4.
When the ADST bit in ADCR is set to 1 by a software or external trigger input, A/D
conversion starts on the channel with the lowest number.
When A/D conversion for each enabled channel is completed, the result is sequentially
transferred to the A/D data register corresponding to each channel.
When conversion of all the enabled channels is completed, the ADF bit in ADSR is set to
1. If the ADIE bit is set to 1 at this time, an ADC_INT interrupt is requested after A/D
conversion ends.
After A/D conversion ends, the ADST bit is automatically cleared to 0 and the A/D
converter enters idle state. If ADST is cleared to 0 before all enabled ADC channels
conversion done, ADC controller will finish current conversion and the result of the
lowest enabled ADC channel will become unpredictable.
NuMicro™ NUC100 Series Technical Reference Manual
Figure 5-98 Single-Cycle Scan on Enabled Channels Timing Diagram
- 489 -
Publication Release Date: Oct 22, 2010
Revision V1.06

Related parts for NUC120VE3AN