MCF51MM256CMB Freescale Semiconductor, MCF51MM256CMB Datasheet - Page 18

• Manufacturer Part Number: MCF51MM256CMB
• Description: IC MCU 32BIT 256K FLASH 81MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF51MMr

Specifications of MCF51MM256CMB

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, SCI, SPI, USB OTG
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 48
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x16b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 81-LBGA
• Processor Series: MCF51MM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: TWR-MCF51MM-KIT, TWR-SER, TWR-ELEV, TOWER
• Package: 81MAPBGA
• Device Core: ColdFire
• Family Name: MCF51MM
• Maximum Speed: 50.33 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Number Of Programmable I/os: 48
• Interface Type: I2C/SCI/SPI
• On-chip Adc: 8-chx16-bit
• On-chip Dac: 1-chx12-bit
• Number Of Timers: 1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Electrical Characteristics
For most applications, P
(if P
Solving
where K is a constant pertaining to the particular part. K can be determined from
P
solving
3.4
Although damage from static discharge is much less common on these devices than on early CMOS
circuits, normal handling precautions should be used to avoid exposure to static discharge. Qualification
tests are performed to ensure that these devices can withstand exposure to reasonable levels of static
without suffering any permanent damage.
All ESD testing is in conformity with CDF-AEC-Q00 Stress Test Qualification for Automotive Grade
Integrated Circuits. (http://www.aecouncil.com/) This device was qualified to AEC-Q100 Rev E.
A device is considered to have failed if, after exposure to ESD pulses, the device no longer meets the
device specification requirements. Complete dc parametric and functional testing is performed per the
applicable device specification at room temperature followed by hot temperature, unless specified
otherwise in the device specification.
18
D
Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
(at equilibrium) for a known T
I/O
#
1
2
is neglected) is:
Equation 1
Human Body
Machine
Latch-up
Equation 1
ESD Protection Characteristics
Human Body Model (HBM)
Machine Model (MM)
Model
and
and
Series Resistance
Storage Capacitance
Number of Pulse per pin
Series Resistance
Storage Capacitance
Number of Pulse per pin
Minimum input voltage limit
Maximum input voltage limit
Equation 2
I/O
Equation 2
Table 8. ESD and Latch-Up Protection Characteristics
 P
Rating
Table 7. ESD and Latch-up Test Conditions
int
K = P
A
and can be neglected. An approximate relationship between P
iteratively for any value of T
. Using this value of K, the values of P
for K gives:
D
P
Description
 (T
D
= K  (T
A
+ 273C) + 
J
+ 273C)
Symbol
JA
V
V
HBM
MM
 (P
D
A
)
.
2
2000
200
Min
Symbol
R1
R1
—
—
—
—
C
C
D
and T
Equation 3
Max
—
—
J
Value
1500
–2.5
100
200
7.5
can be obtained by
Freescale Semiconductor
3
0
3
Unit
V
V
by measuring
Unit
pF
pF
—
—


V
V
D
C
T
T
and T
Eqn. 2
Eqn. 3
J