PK30X256VMD100 Freescale Semiconductor, PK30X256VMD100 Datasheet

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... External watchdog monitor – Software watchdog – Low-leakage wakeup unit This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. © 2010–2011 Freescale Semiconductor, Inc. Preliminary Document Number: K30P144M100SF2 Rev. 4, 3/2011 K30P144M100SF2 • ...

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... Communication interfaces – Two Controller Area Network (CAN) modules – Three SPI modules – Two I2C modules – Six UART modules – Secure Digital host controller (SDHC) – I2S module K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 2 Preliminary Freescale Semiconductor, Inc. ...

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... Device clock specifications...................................18 5.2.2 General switching specifications...........................19 5.3 Thermal specifications.......................................................19 5.3.1 Thermal operating requirements...........................19 K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Table of Contents 5.3.2 Thermal attributes.................................................20 6 Peripheral operating requirements and behaviors....................20 6.1 Core modules....................................................................20 6.1.1 Debug trace timing specifications.........................20 6 ...

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... K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 4 http://www.freescale.com Description • Fully qualified, general market flow • Prequalification • K30 • Program flash only • Program flash and FlexMemory Table continues on the next page... Preliminary and perform a part number Values Freescale Semiconductor, Inc. ...

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... An operating requirement is a specified value or range of values for a technical characteristic that you must guarantee during operation to avoid incorrect operation and possibly decreasing the useful life of the chip. K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Description • • • ...

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... Example This is an example of an attribute: Symbol Description CIN_D Input capacitance: digital pins K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 6 Min. Max. 0.9 1.1 Min. Max. 10 130 Min. Max. — 7 Preliminary Unit V Unit µA Unit pF Freescale Semiconductor, Inc. ...

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... Result of exceeding a rating Measured characteristic K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. –0.3 1.2 The likelihood of permanent chip failure increases rapidly as soon as a characteristic begins to exceed one of its operating ratings. Operating rating Preliminary Terminology and guidelines Max ...

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... This is an example of an operating behavior that includes a typical value: K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 8 Normal Limited operating operating range range - No permanent failure - No permanent failure - Correct operation - Possible decreased life - Possible incorrect operation Handling range - No permanent failure Preliminary Fatal range - Probable permanent failure ∞ Freescale Semiconductor, Inc. ...

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... Typical value conditions Typical values assume you meet the following conditions (or other conditions as specified): Symbol T Ambient temperature A V 3.3 V supply voltage DD 4 Ratings K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. Typ 1.00 1.05 1.10 V (V) DD Description ...

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... Table continues on the next page... Preliminary Max. Unit Notes 150 °C 1 260 °C 2 245 Max. Unit Notes 3 — 1 Max. Unit Notes +2000 V 1 +500 V 2 +100 mA Min. Max. Unit –0.3 3.8 V — 185 mA –0.3 5.5 V Freescale Semiconductor, Inc. ...

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... V < voltage required to retain RAM RAM voltage required to retain the VBAT register file RFVBAT BAT K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. –0.3 –25 V – 0.3 DD –0.3 Min. Max. 1.71 3.6 1.71 3.6 –0.1 0.1 – ...

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... Typ. Max. Unit Notes 1.1 TBD V 2.56 TBD V 2.70 TBD V 2.80 TBD V 2.90 TBD V 3.00 TBD 1.60 TBD V 1.80 TBD V 1.90 TBD V 2.00 TBD V 2.10 TBD 1.00 TBD V 1000 TBD μs Typ. Max. Unit Notes 1.1 TBD V Freescale Semiconductor, Inc. . The ...

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... Power mode transition operating behaviors All specifications except t POR assume this clock configuration: • CPU and system clocks = 100 MHz • Bus and FlexBus clocks = 50 MHz • Flash clock = 25 MHz K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. = -10mA V – 0 -3mA V – ...

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... Table continues on the next page... Preliminary Max. Unit Notes 300 μs 1 4.1 μs 123.8 μs 4.1 μs 49.3 μs 4.1 μs 49.2 μs 4.1 μs 5.9 μs 4.1 μs 4.2 μs 4.1 μs 5.8 μs Max. Unit Notes TBD TBD mA TBD mA Freescale Semiconductor, Inc. ...

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... MHz core, system, FlexBus, and bus clock and 1MHz flash clock. MCG configured for fast IRCLK mode. All peripheral clocks enabled but peripherals are not in active operation. Code executing from flash. K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. Typ. ...

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... The following data was measured under these conditions: • MCG in FEI mode (39.0625 kHz IRC), except for 1 MHz core (FBE) • All peripheral clocks enabled but peripherals are not in active operation K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 16 Preliminary Freescale Semiconductor, Inc. ...

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... RE2 V Radiated emissions voltage, band 3 RE3 V Radiated emissions voltage, band 4 RE4 V IEC and SAE level RE_IEC_SAE K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Frequency Typ. band (MHz) 0.15–50 TBD 50–150 TBD 150–500 TBD 500–1000 TBD 0.15– ...

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... MHz SYS Table 8. Capacitance attributes Min. Normal run mode — — — — VLPR mode — — Table continues on the next page... Preliminary Min. Max. Unit — — Max. Unit Notes 100 MHz 50 MHz 50 MHz 25 MHz 2 MHz 2 MHz Freescale Semiconductor, Inc. ...

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... Thermal specifications 5.3.1 Thermal operating requirements Table 9. Thermal operating requirements Symbol Description T Die junction temperature J T Ambient temperature A K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. Max. — 2 — 1 Min. Max. 1.5 — 100 — ...

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... Symbol Description T Clock period cyc K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 20 144 LQFP Frequency dependent Table continues on the next page... Preliminary 144 Unit Notes MAPBGA 50 °C °C °C °C °C °C °C/W 4 Min. Max. Unit MHz Freescale Semiconductor, Inc. ...

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... TCLK frequency of operation • Boundary Scan • JTAG and CJTAG • Serial Wire Debug J2 TCLK cycle period K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Ts Th Table continues on the next page... Preliminary Min. ...

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... Table continues on the next page... Preliminary Min. Max. Unit ns 50 — 20 — 10 — — — ns — — — — ns — — 100 — — ns Min. Max. Unit 1.71 3.6 V MHz 1/J1 — — 25 — 12.5 — — — ns — — — ns Freescale Semiconductor, Inc. ...

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... TRST setup time (negation) to TCLK high TCLK (input) TCLK Data inputs Data outputs Data outputs Data outputs Figure 6. Boundary scan (JTAG) timing K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Figure 5. Test clock input timing J7 J8 ...

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... There are no specifications necessary for the device's system modules. 6.3 Clock modules K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 24 J11 J12 J11 Figure 7. Test Access Port timing J14 Figure 8. TRST timing Preliminary J9 J10 Input data valid Output data valid Output data valid Freescale Semiconductor, Inc. ...

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... DCO output Low range (DRS=00) dco frequency range Mid range (DRS=01) Mid-high range (DRS=10) High range (DRS=11) K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Table 13. MCG specifications Min. — 32.768 31.25 — ...

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... Preliminary Typ. Max. Unit Notes — MHz 4, — MHz — MHz — MHz TBD ps TBD ps — — 100 MHz 950 — µA — 4.0 MHz 400 — — — ± 2.98 % — ± 5.97 % — 0. 1075( pll_ref Freescale Semiconductor, Inc ...

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... Feedback resistor — low-frequency, high-gain mode (HGO=1) Feedback resistor — high-frequency, low-power mode (HGO=0) Feedback resistor — high-frequency, high-gain mode (HGO=1) K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. 1.71 — — ...

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... Table continues on the next page... Preliminary Typ. Max. Unit Notes — — kΩ 200 — kΩ — — kΩ 0 — kΩ 0.6 — — 0.6 — — Typ. Max. Unit Notes — 40 kHz — 8 MHz — 32 MHz — 50 MHz Freescale Semiconductor, Inc. 1 ...

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... Oscillator crystal osc_lo t Crystal start-up time start 1. Proper PC board layout procedures must be followed to achieve specifications. 6.4 Memories and memory interfaces K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. Max. — TBD — ...

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... Table continues on the next page... Preliminary Max. Unit Notes TBD μs 100 ms 1 800 ms 1 Max. Unit Notes 1 μ μ μs 1 TBD μs 2 800 ms 100 ms 2 TBD ms TBD ms TBD ms 2 μs 1 TBD μs Freescale Semiconductor, Inc. ...

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... Maximum times for erase parameters based on expectations at cycling end-of-life. 3. For byte-writes to an erased FlexRAM location, the aligned word containing the byte must be erased. K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — ...

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... Unit 10 mA Max. Unit Notes — years 2 — years 2 — years 2 — cycles 3 — years 2 — years 2 — years 2 — cycles 3 — years 2 — years 2 — years 2 4 — writes — writes — writes — writes — writes Freescale Semiconductor, Inc. ...

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... FlexRAM • 0.50 for 16-bit or 32-bit writes to FlexRAM • n — data flash cycling endurance nvmcycd K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors EEESPLIT × EEESIZE Preliminary × Write_efficiency × n nvmcycd ...

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... EZP_CK low to EZP_Q output invalid (hold) EP9 EZP_CS negation to EZP_Q tri-state K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 34 Min. 2.7 — — EZP_CK — 0 — Preliminary Max. Unit 3 MHz SYS f /8 MHz SYS — ns — ns — ns — ns — — Freescale Semiconductor, Inc. ...

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... Data and FB_TA input hold 1. Specification is valid for all FB_AD[31:0], FB_BE/BWEn, FB_CSn, FB_OE, FB_R/W,FB_TBST, FB_TSIZ[1:0], FB_ALE, and FB_TS. 2. Specification is valid for all FB_AD[31:0] and FB_TA. K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors EP3 EP2 EP4 ...

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... FB_A[Y] FB2 FB_D[X] Address FB_RW FB_TS FB_ALE FB_CSn FB_OEn FB_BEn FB_TA FB_TSIZ[1:0] Figure 11. FlexBus read timing diagram K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 36 FB3 FB5 Address FB4 Data AA=1 AA=0 FB4 FB5 AA=1 AA=0 TSIZ Preliminary Freescale Semiconductor, Inc. ...

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... Figure 12. FlexBus write timing diagram 6.5 Security and integrity modules There are no specifications necessary for the device's security and integrity modules. 6.6 Analog K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors FB3 Address Data ...

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... Table continues on the next page... Preliminary are achievable on the Table 26 and Max. Unit Notes 3.6 V +100 mV 2 +100 DDA V V SSA V V REFH kΩ kΩ 4 18.0 MHz 5 12.0 MHz Freescale Semiconductor, Inc. ...

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... For guidelines and examples of conversion rate calculation please download the ADC calculator tool http:// cache.freescale.com/files/soft_dev_tools/software/app_software/converters/ADC_CALCULATOR_CNV.zip?fpsp=1 7. For guidelines and examples of conversion rate calculation please download the ADC calculator tool http:// cache.freescale.com/files/soft_dev_tools/software/app_software/converters/ADC_CALCULATOR_CNV.zip?fpsp=1 K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1 Max. ...

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... CHANNEL SELECT CIRCUIT ADC SAR ENGINE R ADIN R ADIN R ADIN R ADIN C ADIN , REFL SSA 2 Max. Unit Notes 1 — MHz ADACK f ADACK — MHz — MHz — MHz ±TBD ADC 4 LSB conversion ±1 clock <12MHz, Max hardware averaging (AVGE = %1, AVGS = %11) Freescale Semiconductor, Inc. ...

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... Avg=32 SFDR Spurious free 16 bit differential mode dynamic range • Avg=32 16 bit single-ended mode • Avg=32 K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors = REFH DDA REFL 1 Min. Typ. ...

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... VREFOUT VREFOUT VREFOUT V — SSA V — SSA Table continues on the next page... Preliminary = V ) (continued) SSA 2 Max. Unit Notes leakage current (refer to the MCU's voltage and current operating ratings) — mV/°C — mV/°C — mV Max. Unit Notes 3 DDA V V DDA Freescale Semiconductor, Inc. ...

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... PGAG=5 • PGAG=6 BW Input signal • 16-bit modes bandwidth • < 16-bit modes PSRR Power supply Gain=1 rejection ration K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1 Typ. — 128 — 64 — 32 — ...

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... DDA to 3.6V TBD %/ leakage AS In current (refer to the MCU's voltage and current operating ratings × 0.583 — dB 16-bit differential — dB mode, Average=32 — dB 16-bit differential — dB mode, Average=32, f =500Hz in — dB 16-bit differential — dB mode, Average=32, f =500Hz in Freescale Semiconductor, Inc. ...

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... I Supply current, low-speed mode (EN=1, PMODE=0) DDLS V Analog input voltage AIN V Analog input offset voltage AIO K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. TBD 12.3 TBD 12.7 TBD 8.4 TBD 8 ...

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... V – 0.5 DD — 20 120 — 2 — –0.5 –0.3 -0.6V. DD Preliminary Typ. Max. Unit 5 — — — — mV — — V — 0 200 ns 250 600 ns — TBD ns 7 — μA — 0.5 3 LSB — 0.3 LSB Freescale Semiconductor, Inc. ...

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... Figure 16. Typical hysteresis vs. Vin level (VDD=3.3V, PMODE=0) K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 1 1.3 1.6 1.9 2.2 Vin level (V) Preliminary HYSTCTR S etting 00 ...

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... A small load capacitance (47 pF) can improve the bandwidth performance of the DAC K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011 1.3 1.6 1.9 2.2 Vin level (V) Min. 1.71 1.13 −40 — — Preliminary HYSTCTR Setting 2.5 2.8 3.1 Max. Unit Notes 3 105 °C 100 Freescale Semiconductor, Inc. ...

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... LP 1. Settling within ±1 LSB 2. The INL is measured for 0+100mV The DNL is measured for 0+100 The DNL is measured for 0+100mV to V K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — — ...

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... Peripheral operating requirements and behaviors 5. Calculated by a best fit curve from V Figure 18. Typical INL error vs. digital code K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 50 +100 mV to VREF−100 mV SS Preliminary Freescale Semiconductor, Inc. ...

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... Table 32. VREF full-range operating behaviors Symbol Description V Voltage reference output with factory trim at out nominal V and temperature=25C DDA K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1.71 −40 — Min. Typ. TBD 1.2 Table continues on the next page ...

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... Typ. Max. Unit Notes — TBD V — 1.202 V 0.5 — mV — See Figure 20 — TBD ppm/year — TBD µA — 1.1 mA — TBD V — 100 µs — TBD mV — TBD dB Max. Unit Notes 50 °C Max. Unit Notes TBD V Freescale Semiconductor, Inc. ...

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... DSPI_PCSn DS3 DSPI_SCK DS7 (CPOL=0) DSPI_SIN DSPI_SOUT Figure 22. DSPI classic SPI timing — master mode K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1.71 — BCLK (t / SCK ...

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... Table continues on the next page... Preliminary Min. Max. Unit 1.71 3.6 V — 6.25 MHz — ns BCLK (t / SCK SCK/2) — — — — ns — — DS9 DS16 DS11 Last data Last data Min. Max. Unit 2.7 3.6 V — 25 MHz Freescale Semiconductor, Inc. ...

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... DSPI_SIN to DSPI_SCK input setup DS14 DSPI_SCK to DSIP_SIN input hold DS15 DSPI_SS active to DSPI_SOUT driven DS16 DSPI_SS inactive to DSPI_SOUT not driven K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Description DS1 DS2 DS8 Data Last data ...

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... First data Data DS14 First data Data Card input clock Table continues on the next page... Preliminary DS9 DS16 DS11 Last data Last data Min. Max. Unit 2.7 3 400 kHz 0 25 MHz 0 20 MHz 0 400 kHz 7 — — ns — Freescale Semiconductor, Inc. ...

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... Table 40. I Num Description Operating voltage S1 I2S_MCLK cycle time K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors (continued) SD3 SD2 SD1 SD6 SD7 SD8 Figure 26 ...

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... Table continues on the next page... Preliminary Min. Max. Unit 45% 55% MCLK period — ns SYS 45% 55% BCLK period — -2.5 — ns — — — — S10 S8 Min. Max. Unit 2.7 3 — ns SYS 45% 55% MCLK period 10 — — ns — — — ns Freescale Semiconductor, Inc. ...

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... ELE Pres5 Electrode capacitance measurement precision Pres20 Electrode capacitance measurement precision Pres100 Electrode capacitance measurement precision K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 2 S slave mode timing (continued) S11 S12 S15 S16 ...

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... Table continues on the next page... Preliminary Max. Unit Notes — fF/count 6 — fF/count 7 16 bits 25 μs 8 — μA TBD μ μA, REFCHRG = 4 128, Max. Unit Notes 58 Hz — — 8000 pF 2 1.15 V 1.85 V — IREG — µ — µA — µA Freescale Semiconductor, Inc. ...

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... To find a package drawing search for the drawing’s document number: If you want the drawing for this package 144-pin LQFP 144-pin MAPBGA 8 Pinout K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. Typ. — 0.28 — 2.98 2.0 − 5% 2.0 3.3 − ...

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... I2S0_TXD S_b PTE11 UART5_RT I2S0_TX_F S_b S PTE12 I2S0_TX_B CLK PTE16 SPI0_PCS0 UART2_TX FTM_CLKIN 0 Preliminary ALT5 ALT6 ALT7 EzPort I2C1_SDA I2C1_SCL FB_AD25 FB_AD24 FB_TA_b FB_BE7_0_ BLS31_24_ b /FB_CS2_b/ FB_BE15_8 _BLS23_16 _b I2S0_CLKIN FB_CS1_b/ FB_TS_b FB_CS0_b FB_AD4 FB_AD3 FB_AD2 FB_AD1 FB_AD0 FTM0_FLT3 Freescale Semiconductor, Inc. ...

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... L3 DAC0_OUT/ DAC0_OUT DAC0_OUT/ CMP1_IN3/ CMP1_IN3/ ADC0_SE2 ADC0_SE2 DAC1_OUT/ DAC1_OUT DAC1_OUT/ CMP2_IN3/ CMP2_IN3/ K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTE17 SPI0_SCK UART2_RX FTM_CLKIN 1 PTE18 SPI0_SOUT UART2_CT I2C0_SDA S_b PTE19 SPI0_SIN UART2_RT I2C0_SCL ...

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... JTAG_TDI EZP_DI JTAG_TDO/ EZP_DO TRACE_SW O JTAG_TMS/ SWD_DIO NMI_b EZP_CS_b CMP2_OUT I2S0_RX_B JTAG_TRS CLK T FB_CLKOU TRACE_CL T KOUT FB_AD18 TRACE_D3 FB_AD17 FTM1_QD_ TRACE_D2 PHA FB_AD16 FTM1_QD_ TRACE_D1 PHB FB_AD15 FTM2_QD_ TRACE_D0 PHA FB_OE_b FTM2_QD_ PHB FB_CS5_b/ I2S0_TXD FTM1_QD_ FB_TSIZ1/ PHA Freescale Semiconductor, Inc. ...

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... G10 PTB4 LCD_P4/ LCD_P4/ ADC1_SE1 ADC1_SE1 PTB5 LCD_P5/ LCD_P5/ ADC1_SE1 ADC1_SE1 1 1 K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTA13 CAN0_RX FTM1_CH1 PTA14 SPI0_PCS0 UART0_TX PTA15 SPI0_SCK UART0_RX PTA16 SPI0_SOUT UART0_CT S_b PTA17 ...

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... PTC3 SPI0_PCS1 UART1_RX FTM0_CH2 Preliminary ALT5 ALT6 ALT7 EzPort LCD_P6 LCD_P7 LCD_P8 LCD_P9 FTM0_FLT1 LCD_P10 FTM0_FLT2 LCD_P11 EWM_IN LCD_P12 EWM_OUT LCD_P13 _b FTM2_QD_ LCD_P14 PHA FTM2_QD_ LCD_P15 PHB CMP0_OUT LCD_P16 CMP1_OUT LCD_P17 CMP2_OUT LCD_P18 LCD_P19 LCD_P20 LCD_P21 LCD_P22 LCD_P23 Freescale Semiconductor, Inc. ...

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... C4 PTD2 LCD_P42 LCD_P42 132 B4 PTD3 LCD_P43 LCD_P43 133 A4 PTD4 LCD_P44 LCD_P44 K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTC4 SPI0_PCS0 UART1_TX FTM0_CH3 PTC5 SPI0_SCK LPT0_ALT2 PTC6 SPI0_SOUT PDB0_EXT RG PTC7 SPI0_SIN PTC8 I2S0_MCLK I2S0_CLKIN ...

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... PTD10 UART5_RT S_b PTD11 SPI2_PCS0 UART5_CT SDHC0_CL S_b KIN PTD12 SPI2_SCK SDHC0_D4 FB_AD7 PTD13 SPI2_SOUT SDHC0_D5 FB_AD6 PTD14 SPI2_SIN SDHC0_D6 FB_AD5 PTD15 SPI2_PCS1 SDHC0_D7 FB_RW_b Preliminary ALT5 ALT6 ALT7 EzPort EWM_OUT LCD_P45 _b FTM0_FLT0 LCD_P46 FTM0_FLT1 LCD_P47 FB_AD9 FB_AD8 Freescale Semiconductor, Inc. ...

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... PGA1_DM/ADC1_DM0/ADC0_DM3 30 VDDA 31 VREFH 32 VREFL 33 VSSA 34 ADC1_SE16/CMP2_IN2/ADC0_SE22 35 ADC0_SE16/CMP1_IN2/ADC0_SE21 36 Figure 29. K30 144 LQFP Pinout Diagram K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Preliminary Pinout 108 VLL3 107 VSS 106 PTC3 105 PTC2 104 PTC1 103 PTC0 102 PTB23 101 ...

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... PTB23 PTB22 D PTB21 PTB20 PTB19 PTB18 E PTB17 PTB16 PTB11 PTB10 F PTB9 PTB8 PTB7 PTB6 G PTB5 PTB4 PTB3 PTB2 H PTB1 PTB0 PTA29 PTA28 J PTA13 PTA27 PTA26 PTA25 K PTA12 PTA16 PTA17 PTA24 L PTA11 PTA14 PTA15 RESET_b M PTA10 VSS PTA19 PTA18 Freescale Semiconductor, Inc. ...

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... Date 2 3/2011 3 3/2011 4 3/2011 K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Substantial Changes Many updates throughout Added sections that were inadvertently removed in previous revision Reworded I footnote in "Voltage and Current Operating Requirements" IC table. Added paragraph to "Peripheral operating requirements and behaviors" ...

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... Freescale Semiconductor makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any liability, including without limitation consequential or incidental damages. "Typical" parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time ...