AFS250-FGG256 Actel, AFS250-FGG256 Datasheet - Page 321

FPGA - Field Programmable Gate Array 250K System Gates

AFS250-FGG256

Manufacturer Part Number
AFS250-FGG256
Description
FPGA - Field Programmable Gate Array 250K System Gates
Manufacturer
Actel
Datasheet

Specifications of AFS250-FGG256

Processor Series
AFS250
Core
IP Core
Maximum Operating Frequency
1098.9 MHz
Number Of Programmable I/os
114
Data Ram Size
36864
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AFS-Eval-Kit, AFS-BRD600, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
250 K
Package / Case
FPBGA-256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Revision
Advance v1.1
(May 2008)
Advance v1.0
(January 2008)
The following text was incorrect and therefore deleted:
VCC33A
Analog power pin for the analog power supply low-pass filter. An external 100 pF
capacitor should be connected between this pin and ground.
There is still a description of V
All Timing Characteristics tables were updated. For the Differential I/O Standards,
the Standard I/O support tables are new.
Table 2-3 • Array Coordinates
Table 2-12 • Fusion CCC/PLL Specification
A note was added to
A reference to the Peripheral’s User’s Guide was added to the
Power Supply Monitor (VRPSM)"
In
updated.
In
and have been added below the title of the table.
In
for the ADCRESET.
In the
was changed to +10%.
The Analog Quad inputs are tolerant up to 12 V + 10%.
In addition, this statement was deleted from the datasheet:
Each I/O will draw power when connected to power (3 mA at 3 V).
The
The
Diagram for Current Monitor Strobe
Table 2-37 • Recommended Resistor for Different Current Range Measurement
new.
The
In the
changed to 1.3 MHz. In addition, the following sentence was deleted:
The maximum AG pad switching frequency is 1.25 MHz.
The
Figure
In
for 85°C from 538 to 358.
In
The
Table 2-46 • Analog Channel Specifications
The
Table 2-45 • ADC Interface
Table 2-36 • Analog Block Pin
Table 2-38 • Temperature Data
Table 2-26 • FlashROM Access
Table 2-25 • Flash Memory Block
"Terminology" section
"ADC Description" section
"Temperature Monitor" section
"ADC Interface Timing" section
"V
"Current Monitor" section
"Voltage Monitor"
CC15A
2-78,
"Gate Driver"
Figure
Analog Power Supply (1.5 V)" section
2-79, and
Table 2-16 · RTC ACM Memory
section, 25 mA was changed to 20 mA and 1.5 MHz was
section, the following sentence originally had ± 10% and it
is new.
Timing, "Typical-Case" was changed to "Worst-Case."
Table 2-38 • Temperature Data
CC33A
was updated to change the max x and y values
was updated to add the
was significantly updated.
section.
Description, the function description was updated
Format, the temperature K column was changed
was updated to rewrite most of the text and add
is new.
Time, the commercial conditions were missing
on
Analog Power Filter
to
R e v i s i o n 1
Changes
page
Figure 2-74 • Negative Current Monitor
Timing, the commercial conditions were
was updated.
was updated.
2-224.
was updated.
Map.
"Terminology"
Actel Fusion Family of Mixed Signal FPGAs
Format.
Figure 2-72 • Timing
"Voltage Regulator
section.
and
are
2-204
2-224
Page
2-110
2-110
2-118
2-31
2-37
2-42
2-55
2-58
2-82
2-86
2-88
2-90
2-93
2-94
2-96
2-98
N/A
2-9
5 -5

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