PCF8564ACX9/B/1,02 NXP Semiconductors, PCF8564ACX9/B/1,02 Datasheet

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PCF8564A Real time clock and calendar Rev. 02 — 30 September 2010 1. General description The PCF8564A is a CMOS consumption. A programmable clock output, interrupt output and voltage low detector are also provided. All addresses and data are transferred ...

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... NXP Semiconductors 4. Ordering information Table 1. Ordering information Type number Package Name PCF8564AU/5BB/1 PCF8564AU PCF8564AU/5GB/1 PCF8564AU PCF8564AU/5GC/1 PCF8564AU PCF8564AU/10AB/1 PCF8564AU PCF8564ACX9/1 PCF8564ACX9 wafer level chip-size package; PCF8564ACX9/B/1 PCF8564ACX9 wafer level chip-size package; 5. Marking Table 2. Type number PCF8564AU/5BB/1 PCF8564AU/5GB/1 PCF8564AU/5GC/1 PCF8564AU/10AB/1 PCF8564ACX9/1 PCF8564ACX9/B/1 ...

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... NXP Semiconductors 6. Block diagram OSCI OSCILLATOR 32.768 kHz OSCO MONITOR POWER ON RESET VDD VSS WATCH DOG 2 SDA I C INTERFACE SCL PCF8564A Fig 1. Block diagram of PCF8564A PCF8564A Product data sheet DIVIDER CONTROL 00h Control_1 01h Control_2 0Dh CLKOUT_ctrl TIME 02h Seconds 03h ...

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... NXP Semiconductors 7. Pinning information 7.1 Pinning OSCI 1 OSCO 2 y 0,0 PCF8564AU 3 INT Viewed from pad side. For mechanical details, see Figure 27. Fig 2. Pinning diagram of PCF8564AU 7.2 Pin description Table 3. Symbol OSCI OSCO INT V SS SDA SCL CLKOUT V DD CLKOE [1] The substrate (rear side of the die) is wired to V ...

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... NXP Semiconductors 8. Functional description The PCF8564A contains sixteen 8-bit registers with an auto-incrementing address register, an on-chip 32.768 kHz oscillator with integrated capacitors, a frequency divider which provides the source clock for the RTC, a programmable clock output, a timer, a voltage low detector, and a 400 kHz I All sixteen registers (see although not all bits are implemented ...

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... NXP Semiconductors 8.2 Register organization Table 4. Register overview Bit positions labelled as - are not implemented. Bit positions labelled as N should always be written with logic 0. After reset, all registers are set according to Table Address Register name Control registers 00h Control_1 01h Control_2 Time and date registers ...

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... NXP Semiconductors 8.3 Control registers 8.3.1 Register Control_1 Table 5. Control_1 - control and status register 1 (address 00h) bit description Bit Symbol Value [1] 7 TEST1 [1] 5 STOP TESTC 0 [ 000 [1] Default value. [2] Bits labeled as N should always be written with logic 0. 8.3.2 Register Control_2 Table 6 ...

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... NXP Semiconductors 8.3.2.1 Interrupt output Bits TF and AF: countdown set to 1. These bits maintain their value until overwritten using the interface. If both timer and alarm interrupts are required in the application, the source of the interrupt can be determined by reading these bits. To prevent one flag being overwritten while clearing another, a logic AND is performed during a write access ...

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... NXP Semiconductors 8.4 Time and date registers The majority of the registers are coded in the BCD format to simplify application use. 8.4.1 Register Seconds Table 8. Bit Symbol SECONDS [1] Start-up value. Table 9. Seconds value in decimal 8.4.1.1 Voltage low detector and clock monitor The PCF8564A has an on-chip voltage low detector. When V (Voltage Low) flag is set to indicate that the integrity of the clock information is no longer guaranteed ...

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... NXP Semiconductors The VL flag is intended to detect the situation when V under battery operation. Should the oscillator stop or V re-asserted, then the VL flag will be set. This indicates that the time is possibly corrupted. 8.4.2 Register Minutes Table 10. Bit Symbol MINUTES 8.4.3 Register Hours Table 11. ...

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... NXP Semiconductors Table 14. [1] Day Sunday Monday Tuesday Wednesday Thursday Friday Saturday [1] Definition may be re-assigned by the user. 8.4.6 Register Months Table 15. Bit Symbol MONTHS [1] This bit may be re-assigned by the user. [2] This bit is toggled when the register Years overflows from 99 to 00. ...

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... NXP Semiconductors 8.4.7 Register Years Table 17. Bit Symbol YEARS [1] When the register Years overflows from 99 to 00, the century bit C in the register Months is toggled. The PCF8564A compensates for leap years by adding a 29th day to February if the year counter contains a value which is divisible by 4, including the year 00. ...

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... NXP Semiconductors Fig consequence of this method very important to make a read or write access in one go, that is, setting or reading seconds through to years should be made in one single access. Failing to comply with this method could result in the time becoming corrupted example, if the time (seconds through to hours) is set in one access and then in a second access the date is set possible that the time may increment between the two accesses ...

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... NXP Semiconductors 8.6.2 Register Hour_alarm Table 19. Bit Symbol 7 AE_H HOUR_ALARM [1] Default value. 8.6.3 Register Day_alarm Table 20. Bit Symbol 7 AE_D DAY_ALARM [1] Default value. 8.6.4 Register Weekday_alarm Table 21. Bit Symbol 7 AE_W WEEKDAY_ALARM [1] Default value. 8.6.5 Alarm flag By clearing the MSB of one or more of the alarm registers AE_x (Alarm Enable), the corresponding alarm condition(s) are active ...

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... NXP Semiconductors The generation of interrupts from the alarm function is controlled via bit AIE. If bit AIE is enabled, the INT pin follows the condition of bit AF. AF will remain set until cleared by the interface. Once AF has been cleared it will only be set again when the time increments to match the alarm condition once more ...

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... NXP Semiconductors Table 22. Bit Symbol FD[1:0] [1] Default value. 8.8 Timer function The 8-bit countdown timer at address 0Fh is controlled by the timer control register at address 0Eh. The timer control register determines one of 4 source clock frequencies for the timer (4.096 kHz, 64 Hz, 1 Hz, or counts down from a software-loaded 8-bit binary value ...

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... NXP Semiconductors 8.8.2 Register Timer Table 24. Bit Symbol TIMER_VALUE[7:0] 00h to FFh countdown value = n; Table 25. Bit 7 128 The timer register is an 8-bit binary countdown timer enabled or disabled via the timer control register. The source clock for the timer is also selected by the timer control register ...

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... NXP Semiconductors 6. Read time registers to see the first change. 7. Apply 64 clock pulses to CLKOUT. 8. Read time registers to see the second change. Repeat 7 and 8 for additional increments. 8.10 STOP bit function The function of the STOP bit is to allow for accurate starting of the time circuits. The STOP ...

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... NXP Semiconductors Table 26. First increment of time circuits after STOP bit release Bit Prescaler bits STOP Clock is running normally 0 01-0 0001 1101 0100 STOP bit is activated by user XX-0 0000 0000 0000 New time is set by user 1 XX-0 0000 0000 0000 STOP bit is released by user ...

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... NXP Semiconductors Table 27. Address Register name 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch 0Dh 0Eh 0Fh [1] Registers marked ‘x’ are undefined at power-on and unchanged by subsequent resets. 8.11.1 Power-On Reset (POR) override The POR duration is directly related to the crystal oscillator start-up time. Due to the long start-up times experienced by these types of circuits, a circuit has been implemented to disable the POR and speed up functional test of the module ...

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... NXP Semiconductors 9. Characteristics of the I 2 The I C-bus is for bidirectional, two-line communication between different ICs or modules. The two lines are a Serial Data Line (SDA) and a Serial Clock Line (SCL). Both lines must be connected to a positive supply via a pull-up resistor. Data transfer may be initiated only when the bus is not busy ...

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... NXP Semiconductors SDA SCL MASTER TRANSMITTER RECEIVER Fig 14. System configuration 9.4 Acknowledge The number of data bytes transferred between the START and STOP conditions from transmitter to receiver is unlimited. Each byte of eight bits is followed by an acknowledge cycle. • A slave receiver, which is addressed, must generate an acknowledge after the reception of each byte. • ...

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... NXP Semiconductors 2 10. I C-bus protocol 10.1 Addressing Before any data is transmitted on the I addressed first. The addressing is always carried out with the first byte transmitted after the start procedure. The PCF8564A acts as a slave receiver or slave transmitter. Therefore, the clock signal SCL is only an input signal, but the data signal SDA is a bidirectional line. ...

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... NXP Semiconductors acknowledgement from slave S SLAVE ADDRESS 0 A R/W Fig 18. Master reads word after setting word address (write word address; READ data) Fig 19. Master reads slave immediately after first byte (READ mode) 10.3 Interface watchdog timer During read/write operations, the time counting circuits are frozen. To prevent a situation where the accessing device becomes locked and does not clear the interface, the PCF8564A has a built in watchdog timer ...

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... NXP Semiconductors 11. Internal circuitry Fig 20. Device diode protection diagram 12. Limiting values Table 28. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter tot V ESD stg T amb [1] Pass level; Human Body Model (HBM) according to [2] Pass level; Machine Model (MM), according to [3] Pass level ...

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... NXP Semiconductors 13. Static characteristics Table 29. Static characteristics specified. Symbol Parameter Supplies V supply voltage DD I supply current DD Inputs V input voltage I V LOW-level input voltage IL PCF8564A Product data sheet − ° ° + 32.768 kHz; quartz R amb osc Conditions interface inactive °C T amb interface active ...

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... NXP Semiconductors Table 29. Static characteristics specified. Symbol Parameter V HIGH-level input voltage IH I input leakage current LI C input capacitance i Outputs V output voltage O I LOW-level output current OL I HIGH-level output current OH I output leakage current LO Voltage detector V low voltage low [1] For reliable oscillator start-up at power-on: V ⁄ ...

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... NXP Semiconductors (μA) 0.8 0.6 0.4 0 °C; timer = 1 minute; CLKOUT disabled. T amb Fig 21 function (μA) 0.8 0.6 0.4 0.2 0 − timer = 1 minute; CLKOUT = 32 kHz. DD Fig 23 function PCF8564A Product data sheet mgr888 (V) DD Fig 22 mgr890 frequency deviation (ppm) 80 120 T (°C) Fig 24. Frequency deviation as a function of V All information provided in this document is subject to legal disclaimers. Rev. 02 — ...

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... NXP Semiconductors 14. Dynamic characteristics Table 30. Dynamic characteristics specified. Symbol Parameter Oscillator C integrated load capacitance L(itg) Δf /f relative oscillator frequency variation osc osc Quartz crystal parameters R series resistance s C load capacitance L CLKOUT output δ duty cycle on pin CLKOUT CLKOUT 2 I C-bus timing characteristics (see ...

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... NXP Semiconductors SDA SCL SDA Fig 25. I 15. Application information Fig 26. Application diagram PCF8564A Product data sheet t t BUF LOW t HD;STA C-bus timing waveforms SCL CLOCK/CALENDAR OSCI PCF8564A SDA OSCO V SS Connect CLKOE to an appropriate level. All information provided in this document is subject to legal disclaimers. ...

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... NXP Semiconductors 16. Bare die outline Wire bond die; 9 bonding pads Dimensions Die type 1 (3) (1) (1) Unit max mm nom 0.2 1.27 1.9 1.05 0.22 min Dimensions Die type 2 (3) (1) (1) Unit max mm nom 0.2 1.26 1.89 1.05 0.22 min Note 1. Chip dimensions including sawline. ...

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... NXP Semiconductors Table 31. All x/y coordinates represent the position of the center of each pad with respect to the center (x the chip; see Symbol OSCI OSCO INT V SS SDA SCL CLKOUT V DD CLKOE WLCSP9: wafer level chip-size package; 9 bumps; 1.27 x 1 0,0 x (2) ...

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... NXP Semiconductors Table 32. All x/y coordinates represent the position of the center of each bump with respect to the center (x the chip; see Symbol OSCI OSCO INT V SS SDA SCL CLKOUT V DD CLKOE Fig 29. Alignment marks of all PCF8564A types Table 33. All x/y coordinates represent the position of the REF point (see (x the chip ...

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... NXP Semiconductors 18. Packing information 18.1 Wafer and Film Frame Carrier (FFC) information Marking code Straight edge of the wafer Wafer thickness, see Table Fig 30. Wafer layout of PCF8564AU PCF8564A Product data sheet die type μm die type μm 34. All information provided in this document is subject to legal disclaimers. ...

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... NXP Semiconductors Marking code Straight edge of the wafer Wafer thickness, see Table Fig 31. Wafer layout of PCF8564ACX9 PCF8564A Product data sheet 84 μm 34. All information provided in this document is subject to legal disclaimers. Rev. 02 — 30 September 2010 PCF8564A Real time clock and calendar 18 μm 18 μm ...

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... NXP Semiconductors 214.50 mm Fig 32. Film Frame Carrier (FFC) for 6 inch wafer Table 34. PCF8564A wafer information Type number Wafer thickness PCF8564AU/5BB/1 0.28 mm PCF8564AU/5GB/1 0.69 mm PCF8564AU/5GC/1 0.69 mm PCF8564AU/10AB/1 0.20 mm PCF8564ACX9/1 0.29 mm PCF8564A Product data sheet 214.50 mm 73.68 mm metal frame ∅ 193.50 mm plastic film ...

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... NXP Semiconductors 18.2 Tape and reel information Fig 33. Tape and reel details for PCF8564ACX9/B/1 Table 35. Dimension [1] Die is placed in pocket bump side down. Fig 34. Pin 1 indication for PCF8564ACX9/B/1 19. Soldering of WLCSP packages 19.1 Introduction to soldering WLCSP packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering WLCSP (Wafer Level Chip-Size Packages) can be found in application note AN10439 “ ...

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... NXP Semiconductors All NXP WLCSP packages are lead-free. 19.2 Board mounting Board mounting of a WLCSP requires several steps: 1. Solder paste printing on the PCB 2. Component placement with a pick and place machine 3. The reflow soldering itself 19.3 Reflow soldering Key characteristics in reflow soldering are: • ...

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... NXP Semiconductors Fig 35. Temperature profiles for large and small components For further information on temperature profiles, refer to application note AN10365 “Surface mount reflow soldering description”. 19.3.1 Stand off The stand off between the substrate and the chip is determined by: • The amount of printed solder on the substrate • ...

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... NXP Semiconductors Device removal can be done when the substrate is heated until it is certain that all solder joints are molten. The chip can then be carefully removed from the substrate without damaging the tracks and solder lands on the substrate. Removing the device must be done using plastic tweezers, because metal tweezers can damage the silicon ...

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... NXP Semiconductors 20. Abbreviations Table 37. Acronym BCD CMOS FFC HBM LSB MM MOS MSB MSL PCB POR ROM RTC SCL SDA SRAM WLCSP 21. References [1] AN10365 — Surface mount reflow soldering description [2] AN10706 — Handling bare die [3] IEC 60134 — Rating systems for electronic tubes and valves and analogous ...

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... NXP Semiconductors 22. Revision history Table 38. Revision history Document ID Release date PCF8564A v.2 20100930 • Modifications: Added section about watchdog timer • Added new product type PCF8564A_1 20091008 PCF8564A Product data sheet Data sheet status Product data sheet Product data sheet All information provided in this document is subject to legal disclaimers. ...

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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...

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... If there are data sheet limits not guaranteed, these will be separately indicated in the data sheet. There are no post-packing tests performed on individual die or wafers. NXP Semiconductors has no control of third party procedures in the sawing, handling, packing or assembly of the die. Accordingly, NXP Semiconductors assumes no liability for device functionality or performance of the die or systems after third party sawing, handling, packing or assembly of the die ...

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... NXP Semiconductors 25. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 Functional description . . . . . . . . . . . . . . . . . . . 5 8.1 CLKOUT output . . . . . . . . . . . . . . . . . . . . . . . . 5 8.2 Register organization . . . . . . . . . . . . . . . . . . . . 6 8.3 Control registers . . . . . . . . . . . . . . . . . . . . . . . . 7 8.3.1 Register Control_1 . . . . . . . . . . . . . . . . . . . . . . 7 8 ...