XC3S1400AN-5FGG484C Xilinx Inc, XC3S1400AN-5FGG484C Datasheet - Page 74

• Manufacturer Part Number: XC3S1400AN-5FGG484C
• Description: IC FPGA SPARTAN-3AN 484FPGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3ANr

Specifications of XC3S1400AN-5FGG484C

• Number Of Logic Elements/cells: 25344
• Number Of Labs/clbs: 2816
• Total Ram Bits: 589824
• Number Of I /o: 372
• Number Of Gates: 1400000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-BBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 8: Sector-Based Program/Erase Protection
Sector Protection
Table 8-2: Sector Protection Commands
74
Sector Protection Register Read
Sector Protection Register Erase
Sector Protection Register Program
Sector Protection Enable
Sector Protection Disable
Sector Protection Status at Power-Up
Sector Protection Register
Command
Using Sector Protection, the FPGA application protects selected memory sectors against
erroneous program and erase cycles. There are five commands associated with the Sector
Protection feature, as summarized in
At power-up, the Sector Protection feature is disabled, meaning that the FPGA application
has full program and erase access to all sectors.
If the application employs the Sector Protection feature, then the FPGA application should
issue the
The nonvolatile Sector Protection Register specifies which sectors are presently protected
or unprotected. The Sector Protection Register contains between four to 16 bytes of data,
depending on the specific Spartan-3AN FPGA as shown in
control location directly corresponds to the associated ISF memory sector. For example,
control byte 1 protects or unprotects to Sector 1, etc.
The specification for Sector 0 differs from the other sectors because Sector 0 is actually sub-
divided into two smaller sectors of different sizes. The byte-level description for the Sector
0 control appears in
The FPGA application can modify the
register must first be erased using the
Sector Protection is not active until the
FPGA application issues the
As shipped from Xilinx, all ISF memory sectors are unprotected (0x00).
Sector Protection Enable
Read the contents of the
which ISF memory sectors are protected against accidental
erase or program operations, assuming that protecting is
enabled using the
Erase the
programming the
Program the control bytes within the
to protect selected sectors against program or erase operations.
Erase the
Enables protection for the sectors specified in the
Protection
Disables protection for all sectors.
Table
Sector Protection
Sector Protection Register
Register.
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8-4.
Sector Protection Enable
Sector Protection Enable
Sector Protection
Sector Protection Register
command immediately after the FPGA is configured.
Function
Table
Register. Required before
Sector Protection Register Erase
Sector Protection Register
Sector Protection Register
8-2.
Spartan-3AN FPGA In-System Flash User Guide
Register.
before programming.
Sector Protection Register
command.
command.
to determine
Sector
Table
UG333 (v2.1) January 15, 2009
contents, although the
is programmed and the
8-3. The Sector Protect
command.
0x3D + 0x2A +
0x3D + 0x2A +
0x3D + 0x2A +
0x3D + 0x2A +
0x7F + 0xCF
0x7F + 0xFC
0x7F + 0xA9
0x7F + 0x9A
Hexadecimal
Command
Sequence
0x32
R