MC56F8257VLH Freescale Semiconductor, MC56F8257VLH Datasheet - Page 45

DSC 64K FLASH 60MHZ 64-LQFP

MC56F8257VLH

Manufacturer Part Number
MC56F8257VLH
Description
DSC 64K FLASH 60MHZ 64-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr

Specifications of MC56F8257VLH

Core Processor
56800E
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
4K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x12b, D/A 1x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-LQFP
Product
DSCs
Processor Series
56800E
Core
56800E
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
54
Data Ram Size
8 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
Package
64LQFP
Family Name
MC56F82xx
Maximum Speed
60 MHz
Data Bus Width
16 Bit
Interface Type
CAN/I2C/SCI/SPI
On-chip Dac
1-chx12-bit
Number Of Timers
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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5.7.3
In addition to how PWM0_EXTA, PWM1_EXTA, PWM2_EXTA, and PWM3_EXTA connect to crossbar outputs, the ADC
conversion high/low limit compare results of sample0, sample1, and sample2 are used to drive PWM0_EXTB, PWM1_EXTB,
and PWM2_EXTB, respectively. PWM3_EXTB is permanently tied to GND.
State of PWM0_EXTB:
State of PWM1_EXTB:
Freescale Semiconductor
XBAR_OUT7
XBAR_OUT8
XBAR_OUT9
XBAR_OUT10
XBAR_OUT11
XBAR_OUT12
XBAR_OUT13
XBAR_OUT14
XBAR_OUT15
XBAR_OUT16
XBAR_OUT17
XBAR_OUT18
XBAR_OUT19
XBAR_OUT20
XBAR_OUT21
XBAR_OUT22
XBAR_OUT23
XBAR_OUT24
XBAR_OUT25
XBAR_OUT26
XBAR_OUT27
XBAR_OUT28
XBAR_OUT29
XBAR_OUTn
If the ADC conversion result in SAMPLE0 is greater than the value programmed into the high limit register 0,
PWM0_EXTB is driven low.
If the ADC conversion result in SAMPLE0 is less than the value programmed into the low limit register 0,
PWM0_EXTB is driven high.
If the ADC conversion result in SAMPLE1 is greater than the value programmed into the high limit register 1,
PWM1_EXTB is driven low.
Interconnection of PWM Module and ADC Module
ADCB
DAC
CMPA
CMPB
CMPC
PWM0 EXTA
PWM1 EXTA
PWM2 EXTA
PWM3 EXTA
PWM0 EXT_SYNC
PWM1 EXT_SYNC
PWM2 EXT_SYNC
PWM3 EXT_SYNC
PWM EXT_CLK
PWM FAULT0
PWM FAULT1
PWM FAULT2
PWM FAULT3
PWM FORCE
TB0
TB1
TB2
TB3
Table 16. Crossbar Output Signal Assignments (continued)
Output to
MC56F825x/MC56F824x Digital Signal Controller, Rev. 3
eFlexPWM submodule 0 Alternate Control signal
eFlexPWM submodule 1 Alternate Control signal
eFlexPWM submodule 2 Alternate Control signal
eFlexPWM submodule 3 Alternate Control signal
eFlexPWM submodule 0 External Synchronization signal
eFlexPWM submodule 1 External Synchronization signal
eFlexPWM submodule 2 External Synchronization signal
eFlexPWM submodule 3 External Synchronization signal
Quad Timer B0 Input when SIM_GPS3[12] is set
Quad Timer B1 Input when SIM_GPS3[13] is set
Quad Timer B2 Input when SIM_GPS3[14] is set
Quad Timer B3 Input when SIM_GPS3[15] is set
ADCB Trigger
12-bit DAC SYNC_IN
Comparator A Window/Sample
Comparator B Window/Sample
Comparator C Window/Sample
eFlexPWM External Clock signal
eFlexPWM Module FAULT0
eFlexPWM Module FAULT1
eFlexPWM Module FAULT2
eFlexPWM Module FAULT3
eFlexPWM External Output Force signal
Function
General System Control Information
45

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