MCZ33905BS3EK Freescale Semiconductor, MCZ33905BS3EK Datasheet

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MCZ33905BS3EK

Manufacturer Part Number
MCZ33905BS3EK
Description
IC SBC CAN HS 3.3V 32SOIC
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MCZ33905BS3EK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Freescale Semiconductor
Technical Data
© Freescale Semiconductor, Inc., 2010 - 2011. All rights reserved.
Freescale Semiconductor, Inc. reserves the right to change the detail specifications,
as may be required, to permit improvements in the design of its products.
SBC Gen2 with CAN High Speed
and LIN Interface
Chip (SBC). It combines several features and enhances present
module designs. The device works as an advanced power
management unit for the MCU with additional integrated circuits such
as sensors, and CAN transceivers. It has a built-in enhanced high
speed CAN interface (ISO11898-2 and -5) with local and bus failure
diagnostics, protection, and Fail Safe Operation Modes. The SBC may
include zero, one or two LIN 2.1 interfaces with LIN output pin switches.
It includes up to four Wake-Up input pins that can also be configured as
output drivers for flexibility.
low-current consumption. In addition, the device is part of a family
concept where pin compatibility adds versatility to module design.
state machine and concept solution.
Features
• Voltage regulator for MCU, 5.0 or 3.3 V, part number selectable, with
• Voltage, current, and temperature protection
• Extremely low quiescent current in (LP) Modes
• Fully-protected embedded 5.0 V regulator for the CAN driver
• Multiple under-voltage detections to address various MCU
• Auxiliary 5.0 or 3.3 V SPI configurable regulator, for additional ICs,
• MUX (except 33903) output pin for device internal analog signal
• Advanced SPI, MCU, ECU power supply, and critical pins
• Multiple Wake-Up sources in (LP) Modes: CAN or LIN bus, I/O
• ISO11898-5 high speed CAN interface compatibility for baud rates of
The 33903/4/5 is the second generation family of the System Basis
This device implements multiple Low Power (LP) Modes, with very
The 33903/4/5 also implements an innovative and advanced fail-safe
possibility of usage external PNP to extend current capability and
share power dissipation
specifications and system operation modes (i.e. cranking)
with over-current detection and under-voltage protection
monitoring and power supply monitoring
diagnostics and monitoring.
transition, automatic timer, SPI message, and V
detection.
40 kb/s to 1.0 Mb/s
DD
over-current
See
EK Suffix (Pb-Free)
Table of Contents 2
98ASA10556D
32-PIN SOIC
ORDERING INFORMATION
Document Number: MC33903_4_5
SYSTEM BASIS CHIP
33903/4/5
33903/
EK Suffix (Pb-Free)
98ASA10506D
54-PIN SOIC
Rev. 6.0, 4/2011

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