NX3L1G3157GW,125 NXP Semiconductors, NX3L1G3157GW,125 Datasheet

IC ANALOG SWITCH SPDT SOT363

NX3L1G3157GW,125

Manufacturer Part Number
NX3L1G3157GW,125
Description
IC ANALOG SWITCH SPDT SOT363
Manufacturer
NXP Semiconductors
Datasheet

Specifications of NX3L1G3157GW,125

Number Of Switches
1
Switch Configuration
SPDT
On Resistance (max)
4.1 Ohms
On Time (max)
52 ns
Off Time (max)
30 ns
Off Isolation (typ)
- 90 dB
Supply Voltage (max)
4.3 V
Supply Voltage (min)
1.4 V
Supply Current
690 nA, 800 nA
Maximum Power Dissipation
250 mW
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SC-88
Minimum Operating Temperature
- 40 C
Off State Leakage Current (max)
+/- 500 nA
Operating Frequency
60 MHz
Power Dissipation
250 mW
Switch Current (typ)
+/- 350 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-5539-2
1. General description
2. Features and benefits
The NX3L1G3157 is a low-ohmic single-pole double-throw analog switch suitable for use
as an analog or digital 2:1 multiplexer/demultiplexer. It has a digital select input (S), two
independent inputs/outputs (Y0 and Y1) and a common input/output (Z). Schmitt-trigger
action at the digital input makes the circuit tolerant to slower input rise and fall times.
The NX3L1G3157 allows signals with amplitude up to V
or Y1; or from Y0 or Y1 to Z. Its low ON resistance (0.5 Ω) and flatness (0.13 Ω) ensures
minimal attenuation and distortion of transmitted signals.
NX3L1G3157
Low-ohmic single-pole double-throw analog switch
Rev. 08 — 26 April 2010
Wide supply voltage range from 1.4 V to 4.3 V
Very low ON resistance:
Break-before-make switching
High noise immunity
ESD protection:
CMOS low-power consumption
Latch-up performance exceeds 100 mA per JESD78 Class II Level A
Direct interface with TTL levels at 3.0 V
Control input accepts voltages above supply voltage
High current handling capability (350 mA continuous current under 3.3 V supply)
Specified from −40 °C to +85 °C and from −40 °C to +125 °C
1.6 Ω (typical) at V
1.0 Ω (typical) at V
0.55 Ω (typical) at V
0.50 Ω (typical) at V
0.50 Ω (typical) at V
HBM JESD22-A114F Class 3A exceeds 7500 V
MM JESD22-A115-A exceeds 200 V
CDM AEC-Q100-011 revision B exceeds 1000 V
IEC61000-4-2 contact discharge exceeds 8000 V for switch ports
CC
CC
CC
CC
CC
= 1.4 V
= 1.65 V
= 2.3 V
= 2.7 V
= 4.3 V
CC
to be transmitted from Z to Y0
Product data sheet

Related parts for NX3L1G3157GW,125

NX3L1G3157GW,125 Summary of contents

Page 1

NX3L1G3157 Low-ohmic single-pole double-throw analog switch Rev. 08 — 26 April 2010 1. General description The NX3L1G3157 is a low-ohmic single-pole double-throw analog switch suitable for use as an analog or digital 2:1 multiplexer/demultiplexer. It has a digital select input ...

Page 2

... NXP Semiconductors 3. Applications Cell phone PDA Portable media player 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name −40 °C to +125 °C NX3L1G3157GW −40 °C to +125 °C NX3L1G3157GM 5. Marking [1] Table 2. Marking codes Type number NX3L1G3157GW NX3L1G3157GM [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. ...

Page 3

... NXP Semiconductors 7. Pinning information 7.1 Pinning NX3L1G3157 1 Y1 GND 001aai592 Fig 3. Pin configuration SOT363 (SC-88) 7.2 Pin description Table 3. Pin description Symbol Pin Y1 1 GND Functional description [1] Table 4. Function table Input [ HIGH voltage level LOW voltage level. NX3L1G3157_8 Product data sheet ...

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... NXP Semiconductors 9. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC V input voltage I V switch voltage SW I input clamping current IK I switch clamping current SK I switch current ...

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... NXP Semiconductors 11. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground 0 V). Symbol Parameter Conditions V HIGH-level input voltage LOW-level input voltage input leakage select input S; I current V = GND to 4.3 V; ...

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... NXP Semiconductors 11.1 Test circuits V − Fig 5. Test circuit for measuring OFF-state leakage current − Fig 6. Test circuit for measuring ON-state leakage current NX3L1G3157_8 Product data sheet Low-ohmic single-pole double-throw analog switch switch GND − GND − 0 0.3 V. ...

Page 7

... NXP Semiconductors 11.2 ON resistance Table 8. ON resistance At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Symbol Parameter R ON resistance (peak) ON(peak) ΔR ON resistance ON mismatch between channels R ON resistance ON(flat) (flatness) [1] Typical values are measured at T [2] Measured at identical V , temperature and input voltage ...

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... NXP Semiconductors 11.3 ON resistance test circuit and graphs GND Fig 7. Test circuit for measuring ON resistance NX3L1G3157_8 Product data sheet Low-ohmic single-pole double-throw analog switch R switch switch I SW 001aag563 Fig 8. All information provided in this document is subject to legal disclaimers. Rev. 08 — 26 April 2010 NX3L1G3157 1 ...

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... NXP Semiconductors 1 (Ω) 1.2 0.8 0 125 °C. (1) T amb = 85 °C. (2) T amb = 25 °C. (3) T amb = −40 °C. (4) T amb Fig 9. ON resistance as a function of input voltage 1 1 (Ω) 0.8 0.6 0.4 0 125 °C. (1) T amb = 85 °C. (2) T amb = 25 °C. (3) T amb = − ...

Page 10

... NXP Semiconductors 1 (Ω) 0.8 0.6 0.4 0 125 °C. (1) T amb = 85 °C. (2) T amb = 25 °C. (3) T amb = −40 °C. (4) T amb Fig 13. ON resistance as a function of input voltage 3 12. Dynamic characteristics Table 9. Dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see ...

Page 11

... NXP Semiconductors Table 9. Dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Symbol Parameter Conditions t break-before-make see b-m time [1] Typical values are measured at T [2] Break-before-make guaranteed by design. 12.1 Waveform and test circuits Y1 connected connected to V Measurement points are given in Logic level typical output voltage level that occurs with the output load ...

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... NXP Semiconductors a. Test circuit b. Input and output measurement points Fig 16. Test circuit for measuring break-before-make timing G Test data is given in Table Definitions test circuit Load resistance Load capacitance including jig and probe capacitance External voltage for measuring switching times. EXT Fig 17. Load circuit for switching times Table 11 ...

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... NXP Semiconductors 12.2 Additional dynamic characteristics Table 12. Additional dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); V ≤ specified 2.5 ns amb Symbol Parameter THD total harmonic distortion −3 dB frequency f (−3dB) response α isolation (OFF-state) iso V crosstalk voltage ct Q charge injection ...

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... NXP Semiconductors Adjust f voltage to obtain 0 dBm level at output. Increase f i Fig 19. Test circuit for measuring the frequency response when channel is in ON-state V Adjust f voltage to obtain 0 dBm level at input. i Fig 20. Test circuit for measuring isolation (OFF-state) NX3L1G3157_8 Product data sheet Low-ohmic single-pole double-throw analog switch ...

Page 15

... NXP Semiconductors a. Test circuit b. Input and output pulse definitions Fig 21. Test circuit for measuring crosstalk voltage between digital inputs and switch NX3L1G3157_8 Product data sheet Low-ohmic single-pole double-throw analog switch logic input 0.5V CC logic off on input ( All information provided in this document is subject to legal disclaimers. ...

Page 16

... NXP Semiconductors a. Test circuit b. Input and output pulse definitions = ΔV × C Definition: Q inj O L ΔV = output voltage variation generator resistance. gen V = generator voltage. gen Fig 22. Test circuit for measuring charge injection NX3L1G3157_8 Product data sheet Low-ohmic single-pole double-throw analog switch V CC ...

Page 17

... NXP Semiconductors 13. Package outline Plastic surface-mounted package; 6 leads y 6 pin 1 index DIMENSIONS (mm are the original dimensions UNIT max 0.30 1.1 0.25 mm 0.1 0.20 0.8 0.10 OUTLINE VERSION IEC SOT363 Fig 23. Package outline SOT363 (SC-88) NX3L1G3157_8 Product data sheet Low-ohmic single-pole double-throw analog switch ...

Page 18

... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1. 6× (2) terminal 1 index area DIMENSIONS (mm are the original dimensions) ( UNIT b D max max 0.25 1.5 mm 0.5 0.04 0.17 1.4 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. ...

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... NXP Semiconductors 14. Abbreviations Table 13. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal-Oxide Semiconductor ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model PDA Personal Digital Assistant TTL Transistor-Transistor Logic 15. Revision history Table 14. Revision history Document ID Release date NX3L1G3157_8 20100426 • ...

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... For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail ...

Page 21

... NXP Semiconductors 17. Contact information For more information, please visit: For sales office addresses, please send an email to: NX3L1G3157_8 Product data sheet Low-ohmic single-pole double-throw analog switch http://www.nxp.com salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. Rev. 08 — 26 April 2010 NX3L1G3157 © ...

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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 7 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 8 Functional description . . . . . . . . . . . . . . . . . . . 3 9 Limiting values Recommended operating conditions Static characteristics 11.1 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 11 ...

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